[Python-checkins] r78309 - in python/branches/py3k: Doc/library/struct.rst

[andrew.kuchling]

Author: andrew.kuchling
Date: Mon Feb 22 16:15:21 2010
New Revision: 78309

Log:
Merged revisions 78308 via svnmerge from 
svn+ssh://pythondev@svn.python.org/python/trunk

........
  r78308 | andrew.kuchling | 2010-02-22 10:13:17 -0500 (Mon, 22 Feb 2010) | 2 lines
  
  #6414: clarify description of processor endianness.
  Text by Alexey Shamrin; I changed 'DEC Alpha' to the more relevant 'Intel Itanium'.
........


Modified:
   python/branches/py3k/   (props changed)
   python/branches/py3k/Doc/library/struct.rst

Modified: python/branches/py3k/Doc/library/struct.rst
==============================================================================
--- python/branches/py3k/Doc/library/struct.rst	(original)
+++ python/branches/py3k/Doc/library/struct.rst	Mon Feb 22 16:15:21 2010
@@ -184,9 +184,11 @@
 
 If the first character is not one of these, ``'@'`` is assumed.
 
-Native byte order is big-endian or little-endian, depending on the host system.
-For example, Motorola and Sun processors are big-endian; Intel and DEC
-processors are little-endian.
+Native byte order is big-endian or little-endian, depending on the host
+system. For example, Intel x86 and AMD64 (x86-64) are little-endian;
+Motorola 68000 and PowerPC G5 are big-endian; ARM and Intel Itanium feature
+switchable endianness (bi-endian). Use ``sys.byteorder`` to check the
+endianness of your system.
 
 Native size and alignment are determined using the C compiler's
 ``sizeof`` expression.  This is always combined with native byte order.