[pypy-commit] pypy arm64: general progress

fijal pypy.commits at gmail.com
Wed May 15 09:51:12 EDT 2019


Author: Maciej Fijalkowski <fijall at gmail.com>
Branch: arm64
Changeset: r96619:85965b5b4b41
Date: 2019-05-15 13:50 +0000
http://bitbucket.org/pypy/pypy/changeset/85965b5b4b41/

Log:	general progress

diff --git a/rpython/jit/backend/aarch64/opassembler.py b/rpython/jit/backend/aarch64/opassembler.py
--- a/rpython/jit/backend/aarch64/opassembler.py
+++ b/rpython/jit/backend/aarch64/opassembler.py
@@ -123,6 +123,26 @@
         self.emit_int_comp_op(op, arglocs[0], arglocs[1])
         return c.EQ
 
+    def emit_comp_op_int_ne(self, op, arglocs):
+        self.emit_int_comp_op(op, arglocs[0], arglocs[1])
+        return c.NE
+
+    def emit_comp_op_uint_lt(self, op, arglocs):
+        self.emit_int_comp_op(op, arglocs[0], arglocs[1])
+        return c.LO
+
+    def emit_comp_op_uint_le(self, op, arglocs):
+        self.emit_int_comp_op(op, arglocs[0], arglocs[1])
+        return c.LS
+
+    def emit_comp_op_uint_gt(self, op, arglocs):
+        self.emit_int_comp_op(op, arglocs[0], arglocs[1])
+        return c.HI
+
+    def emit_comp_op_uint_ge(self, op, arglocs):
+        self.emit_int_comp_op(op, arglocs[0], arglocs[1])
+        return c.HS
+
     emit_op_int_lt = gen_comp_op('emit_op_int_lt', c.LT)
     emit_op_int_le = gen_comp_op('emit_op_int_le', c.LE)
     emit_op_int_gt = gen_comp_op('emit_op_int_gt', c.GT)
@@ -144,12 +164,20 @@
         self.mc.CMP_ri(reg.value, 0)
         self.mc.CSET_r_flag(res.value, c.EQ)
 
+    def emit_comp_op_int_is_true(self, op, arglocs):
+        self.mc.CMP_ri(arglocs[0].value, 0)
+        return c.NE
+
     def emit_op_int_is_zero(self, op, arglocs):
         reg, res = arglocs
 
         self.mc.CMP_ri(reg.value, 0)
         self.mc.CSET_r_flag(res.value, c.NE)
 
+    def emit_comp_op_int_is_zero(self, op, arglocs):
+        self.mc.CMP_ri(arglocs[0].value, 0)
+        return c.EQ
+
     def emit_op_int_neg(self, op, arglocs):
         reg, res = arglocs
         self.mc.SUB_rr_shifted(res.value, r.xzr.value, reg.value)
@@ -181,6 +209,15 @@
         index = op.getarg(0).getint()
         self.load_from_gc_table(res_loc.value, index)
 
+    def emit_op_debug_merge_point(self, op, arglocs):
+        pass
+    
+    emit_op_jit_debug = emit_op_debug_merge_point
+    emit_op_keepalive = emit_op_debug_merge_point
+    emit_op_enter_portal_frame = emit_op_debug_merge_point
+    emit_op_leave_portal_frame = emit_op_debug_merge_point
+
+
     # -------------------------------- fields -------------------------------
 
     def emit_op_gc_store(self, op, arglocs):
diff --git a/rpython/jit/backend/aarch64/regalloc.py b/rpython/jit/backend/aarch64/regalloc.py
--- a/rpython/jit/backend/aarch64/regalloc.py
+++ b/rpython/jit/backend/aarch64/regalloc.py
@@ -14,7 +14,7 @@
         get_scale
 from rpython.rtyper.lltypesystem import lltype, rffi, rstr, llmemory
 from rpython.jit.backend.aarch64 import registers as r
-from rpython.jit.backend.arm.jump import remap_frame_layout_mixed
+from rpython.jit.backend.aarch64.jump import remap_frame_layout_mixed
 from rpython.jit.backend.aarch64.locations import imm
 from rpython.jit.backend.llsupport.gcmap import allocate_gcmap
 from rpython.jit.backend.llsupport.descr import CallDescr
@@ -303,6 +303,11 @@
         self.free_temp_vars()
         return [base_loc, value_loc]
 
+    def void(self, op):
+        return []
+
+    prepare_op_jit_debug = void
+
     def prepare_int_ri(self, op, res_in_cc):
         boxes = op.getarglist()
         a0, a1 = boxes
@@ -390,9 +395,14 @@
 
     prepare_comp_op_int_lt = prepare_int_cmp
     prepare_comp_op_int_le = prepare_int_cmp
-    prepare_comp_op_int_eq = prepare_int_cmp
     prepare_comp_op_int_ge = prepare_int_cmp
     prepare_comp_op_int_gt = prepare_int_cmp
+    prepare_comp_op_int_ne = prepare_int_cmp
+    prepare_comp_op_int_eq = prepare_int_cmp
+    prepare_comp_op_uint_lt = prepare_int_cmp
+    prepare_comp_op_uint_le = prepare_int_cmp
+    prepare_comp_op_uint_ge = prepare_int_cmp
+    prepare_comp_op_uint_gt = prepare_int_cmp
 
     def prepare_op_int_le(self, op):
         return self.prepare_int_cmp(op, False)
@@ -420,6 +430,15 @@
     prepare_op_int_neg = prepare_unary
     prepare_op_int_invert = prepare_unary
 
+    def prepare_comp_unary(self, op, res_in_cc):
+        a0 = op.getarg(0)
+        assert not isinstance(a0, Const)
+        reg = self.make_sure_var_in_reg(a0)
+        return [reg]
+
+    prepare_comp_op_int_is_true = prepare_comp_unary
+    prepare_comp_op_int_is_zero = prepare_comp_unary        
+
     # --------------------------------- fields --------------------------
 
     def prepare_op_gc_store(self, op):


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