[pypy-commit] pypy arm64: use x19 and x20

fijal pypy.commits at gmail.com
Thu Jun 27 11:53:32 EDT 2019


Author: Maciej Fijalkowski <fijall at gmail.com>
Branch: arm64
Changeset: r96870:b95baf585934
Date: 2019-06-27 15:06 +0000
http://bitbucket.org/pypy/pypy/changeset/b95baf585934/

Log:	use x19 and x20

diff --git a/rpython/jit/backend/aarch64/TODO b/rpython/jit/backend/aarch64/TODO
--- a/rpython/jit/backend/aarch64/TODO
+++ b/rpython/jit/backend/aarch64/TODO
@@ -2,3 +2,4 @@
 * int_cmp - IMM
 * guard_nonnull_class - think about a better way
 * cond_call and following guard_exception
+* we have a 3-register gap on JITFRAME
diff --git a/rpython/jit/backend/aarch64/arch.py b/rpython/jit/backend/aarch64/arch.py
--- a/rpython/jit/backend/aarch64/arch.py
+++ b/rpython/jit/backend/aarch64/arch.py
@@ -8,5 +8,5 @@
 # A jitframe is a jit.backend.llsupport.llmodel.jitframe.JITFRAME
 # Stack frame fixed area
 # Currently only the force_index
-JITFRAME_FIXED_SIZE = 16 + 8
-# 16 GPR + 8 VFP Regs # 20 if we want to use 4 extra x19..x22
+JITFRAME_FIXED_SIZE = 16 + 2 + 8
+# 18 GPR + 8 VFP Regs # 20 if we want to use 4 extra x19..x22
diff --git a/rpython/jit/backend/aarch64/assembler.py b/rpython/jit/backend/aarch64/assembler.py
--- a/rpython/jit/backend/aarch64/assembler.py
+++ b/rpython/jit/backend/aarch64/assembler.py
@@ -405,7 +405,6 @@
         mc.LDP_rri(r.x0.value, r.x1.value, r.sp.value, 0)
         
         mc.STR_ri(r.lr.value, r.sp.value, 0)
-        mc.STR_ri(r.x19.value, r.sp.value, WORD)
 
         # store the current gcmap(r0) in the jitframe
         gcmap_ofs = self.cpu.get_ofs_of_frame_field('jf_gcmap')
@@ -445,7 +444,6 @@
 
         # return
         mc.LDR_ri(r.lr.value, r.sp.value, 0)
-        mc.LDR_ri(r.x19.value, r.sp.value, WORD)
         mc.ADD_ri(r.sp.value, r.sp.value, 2*WORD)
         mc.RET_r(r.lr.value)
         self._frame_realloc_slowpath = mc.materialize(self.cpu, [])        
diff --git a/rpython/jit/backend/aarch64/codebuilder.py b/rpython/jit/backend/aarch64/codebuilder.py
--- a/rpython/jit/backend/aarch64/codebuilder.py
+++ b/rpython/jit/backend/aarch64/codebuilder.py
@@ -4,9 +4,17 @@
 from rpython.jit.backend.aarch64.locations import RegisterLocation
 from rpython.jit.backend.aarch64 import registers as r
 from rpython.rlib.rarithmetic import intmask
-from rpython.rtyper.lltypesystem import lltype, rffi
+from rpython.rtyper.lltypesystem import lltype, rffi, llmemory
 from rpython.tool.udir import udir
 
+clear_cache = rffi.llexternal(
+    "__clear_cache",
+    [llmemory.Address, llmemory.Address],
+    lltype.Void,
+    _nowrapper=True,
+    sandboxsafe=True)
+
+
 class AbstractAarch64Builder(object):
     def write32(self, word):
         self.writechar(chr(word & 0xFF))
diff --git a/rpython/jit/backend/aarch64/registers.py b/rpython/jit/backend/aarch64/registers.py
--- a/rpython/jit/backend/aarch64/registers.py
+++ b/rpython/jit/backend/aarch64/registers.py
@@ -11,7 +11,7 @@
 
 vfpregisters = [VFPRegisterLocation(i) for i in range(32)]
 all_vfp_regs = vfpregisters[:8]
-all_regs = registers[:16] #+ [x19, x20, x21, x22]
+all_regs = registers[:16]+ [x19, x20] #, x21, x22]
 
 lr = x30
 fp = x29
@@ -21,7 +21,7 @@
 ip1 = x17
 ip0 = x16
 
-callee_saved_registers = [] # x19, x20, x21, x22]
+callee_saved_registers = [x19, x20] # , x21, x22]
 vfp_argument_regs = caller_vfp_resp = all_vfp_regs[:8]
 [d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12, d13, d14,
  d15, d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27,
@@ -30,4 +30,5 @@
 vfp_ip = d15
 
 argument_regs = [x0, x1, x2, x3, x4, x5, x6, x7]
+callee_resp = [x19, x20] # ,x21, x22]
 caller_resp = argument_regs + [x8, x9, x10, x11, x12, x13, x14, x15]
diff --git a/rpython/jit/backend/aarch64/runner.py b/rpython/jit/backend/aarch64/runner.py
--- a/rpython/jit/backend/aarch64/runner.py
+++ b/rpython/jit/backend/aarch64/runner.py
@@ -10,7 +10,7 @@
     """ARM 64"""
     backend_name = "aarch64"
     frame_reg = r.fp
-    all_reg_indexes = range(len(r.all_regs))
+    all_reg_indexes = range(16) + [-1, -1, -1, 16, 17]
     gen_regs = r.all_regs
     float_regs = VFPRegisterManager.all_regs
     supports_floats = True


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