[pypy-commit] pypy redirect-assembler-jitlog: target address could be some bytes off, one reason why so many redirect assembler instr. are not found

[plan_rich]

Author: Richard Plangger <planrichi at gmail.com>
Branch: redirect-assembler-jitlog
Changeset: r87688:4026f1af404d
Date: 2016-10-10 10:51 +0200
http://bitbucket.org/pypy/pypy/changeset/4026f1af404d/

Log:	target address could be some bytes off, one reason why so many
	redirect assembler instr. are not found

diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -466,6 +466,7 @@
                       operations, looptoken, log):
         '''adds the following attributes to looptoken:
                _ll_function_addr    (address of the generated func, as an int)
+               _ll_raw_start        (jitlog: address of the first byte to asm memory)
                _ll_loop_code       (debug: addr of the start of the ResOps)
                _x86_fullsize        (debug: full size including failure)
         '''
@@ -539,6 +540,7 @@
             looptoken._x86_fullsize = full_size
             looptoken._x86_ops_offset = ops_offset
         looptoken._ll_function_addr = rawstart + functionpos
+        looptoken._ll_raw_start = rawstart
 
         if log and logger:
             l = logger.log_trace(jl.MARK_TRACE_ASM, None, self.mc)
@@ -594,6 +596,7 @@
         fullsize = self.mc.get_relative_pos()
         #
         rawstart = self.materialize_loop(original_loop_token)
+        original_loop_token._ll_raw_start = rawstart
         self.patch_gcref_table(original_loop_token, rawstart)
         self.patch_stack_checks(frame_depth_no_fixed_size + JITFRAME_FIXED_SIZE,
                                 rawstart)
@@ -1065,7 +1068,8 @@
             assert mc.get_relative_pos() <= 13
         mc.copy_to_raw_memory(oldadr)
         # log the redirection of the call_assembler_* operation
-        jl.redirect_assembler(oldlooptoken, newlooptoken, newlooptoken.number)
+        asm_adr = newlooptoken._ll_raw_start
+        jl.redirect_assembler(oldlooptoken, newlooptoken, asm_adr)
 
     def dump(self, text):
         if not self.verbose:
diff --git a/rpython/jit/metainterp/compile.py b/rpython/jit/metainterp/compile.py
--- a/rpython/jit/metainterp/compile.py
+++ b/rpython/jit/metainterp/compile.py
@@ -1123,8 +1123,7 @@
     """
     jitcell_token = make_jitcell_token(jitdriver_sd)
     #
-    #logger = jitdriver_sd.metainterp_sd.jitlog
-    #jitcell_token.number = logger.next_id()
+    # record the target of a temporary callback to the interpreter
     jl.tmp_callback(jitcell_token)
     #
     nb_red_args = jitdriver_sd.num_red_args
diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rjitlog/rjitlog.py
--- a/rpython/rlib/rjitlog/rjitlog.py
+++ b/rpython/rlib/rjitlog/rjitlog.py
@@ -312,13 +312,13 @@
     content = ''.join(list)
     jitlog_write_marked(content, len(content))
 
-def redirect_assembler(oldtoken, newtoken, target):
+def redirect_assembler(oldtoken, newtoken, asm_adr):
     if not jitlog_enabled():
         return
     descr_nmr = compute_unique_id(oldtoken)
     new_descr_nmr = compute_unique_id(newtoken)
     list = [MARK_REDIRECT_ASSEMBLER, encode_le_addr(descr_nmr),
-            encode_le_addr(new_descr_nmr), encode_le_addr(target)]
+            encode_le_addr(new_descr_nmr), encode_le_addr(asm_adr)]
     content = ''.join(list)
     jitlog_write_marked(content, len(content))