[pypy-commit] pypy guard-compatible: Fix test_extend_guard_compatible_2 (missing llgraph caching) and add

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: guard-compatible
Changeset: r84527:4f4676f68148
Date: 2016-05-20 17:15 +0200
http://bitbucket.org/pypy/pypy/changeset/4f4676f68148/

Log:	Fix test_extend_guard_compatible_2 (missing llgraph caching) and add
	test_extend_guard_compatible_3

diff --git a/rpython/jit/backend/test/runner_test.py b/rpython/jit/backend/test/runner_test.py
--- a/rpython/jit/backend/test/runner_test.py
+++ b/rpython/jit/backend/test/runner_test.py
@@ -263,7 +263,65 @@
                 assert fail.identifier == 2
             else:
                 assert fail.identifier == 1
-                expected.append(t)
+                if t not in expected:
+                    expected.append(t)
+            assert seen == expected
+
+    def test_extend_guard_compatible_3(self):
+        seen = []
+        def find_compatible(cpu, arg):
+            assert cpu is self.cpu
+            if arg == t2_box._resref:
+                return asminfo43.asmaddr
+            if arg == t3_box._resref:
+                return asminfo44.asmaddr
+            raise AssertionError
+        t1_box, T1_box, d1 = self.alloc_instance(self.T)
+        t2_box, T2_box, d2 = self.alloc_instance(self.T)
+        t3_box, T3_box, d3 = self.alloc_instance(self.T)
+        faildescr1 = BasicFailDescr(1)
+        faildescr1.find_compatible = find_compatible
+        loop = parse("""
+        [p0]
+        guard_compatible(p0, ConstPtr(t1), descr=faildescr1) []
+        finish(p0, descr=fdescr)
+        """, namespace={'fdescr': BasicFinalDescr(2),
+                        'faildescr1': faildescr1,
+                        't1': t1_box._resref})
+        looptoken = JitCellToken()
+        self.cpu.compile_loop(loop.inputargs, loop.operations, looptoken)
+
+        bridge43 = parse("""
+        []
+        finish(p0, descr=fdescr43)
+        """, namespace={'fdescr43': BasicFinalDescr(43)})
+        asminfo43 = self.cpu.compile_bridge(faildescr1, bridge43.inputargs,
+                                            bridge43.operations, looptoken)
+
+        bridge44 = parse("""
+        []
+        finish(p0, descr=fdescr44)
+        """, namespace={'fdescr44': BasicFinalDescr(44)})
+        asminfo44 = self.cpu.compile_bridge(faildescr1, bridge44.inputargs,
+                                            bridge44.operations, looptoken)
+
+        assert seen == []
+
+        t_list = [t1_box._resref, t2_box._resref, t3_box._resref]
+        expected = []
+        for t in t_list * 2:
+            # find_compatible() returns a bridge's address: switch goes there
+            deadframe = self.cpu.execute_token(looptoken, t)
+            fail = self.cpu.get_latest_descr(deadframe)
+            if t == t1_box._resref:
+                assert fail.identifier == 2
+            else:
+                if t == t2_box._resref:
+                    assert fail.identifier == 43
+                else:
+                    assert fail.identifier == 44
+                if t not in expected:
+                    expected.append(t)
             assert seen == expected
 
     def test_compile_with_holes_in_fail_args(self):