[pypy-commit] pypy jit-constptr-2: Implementation and test of the %rip+offset addressing mode on x86-64

arigo pypy.commits at gmail.com
Thu Mar 31 09:38:59 EDT 2016


Author: Armin Rigo <arigo at tunes.org>
Branch: jit-constptr-2
Changeset: r83461:ecde1ca1079a
Date: 2016-03-31 14:44 +0100
http://bitbucket.org/pypy/pypy/changeset/ecde1ca1079a/

Log:	Implementation and test of the %rip+offset addressing mode on x86-64

diff --git a/rpython/jit/backend/x86/rx86.py b/rpython/jit/backend/x86/rx86.py
--- a/rpython/jit/backend/x86/rx86.py
+++ b/rpython/jit/backend/x86/rx86.py
@@ -297,6 +297,20 @@
     return encode_abs, argnum, None, None
 
 # ____________________________________________________________
+# ***X86_64 only*** 
+# Emit a mod/rm referencing an address "RIP + immediate_offset".
+
+ at specialize.arg(2)
+def encode_rip_offset(mc, immediate, _, orbyte):
+    assert mc.WORD == 8
+    mc.writechar(chr(0x05 | orbyte))
+    mc.writeimm32(immediate)
+    return 0
+
+def rip_offset(argnum):
+    return encode_rip_offset, argnum, None, None
+
+# ____________________________________________________________
 # For 64-bits mode: the REX.W, REX.R, REX.X, REG.B prefixes
 
 REX_W = 8
@@ -914,6 +928,7 @@
     add_insn('m', mem_reg_plus_const(modrm_argnum))
     add_insn('a', mem_reg_plus_scaled_reg_plus_const(modrm_argnum))
     add_insn('j', abs_(modrm_argnum))
+    add_insn('p', rip_offset(modrm_argnum))
 
 # Define a regular MOV, and a variant MOV32 that only uses the low 4 bytes of a
 # register
diff --git a/rpython/jit/backend/x86/test/test_rx86_32_auto_encoding.py b/rpython/jit/backend/x86/test/test_rx86_32_auto_encoding.py
--- a/rpython/jit/backend/x86/test/test_rx86_32_auto_encoding.py
+++ b/rpython/jit/backend/x86/test/test_rx86_32_auto_encoding.py
@@ -279,6 +279,8 @@
         if modes:
             tests = self.get_all_tests()
             m = modes[0]
+            if m == 'p' and self.WORD == 4:
+                return []
             lst = tests[m]()
             random.shuffle(lst)
             if methname == 'PSRAD_xi' and m == 'i':
diff --git a/rpython/jit/backend/x86/test/test_rx86_64_auto_encoding.py b/rpython/jit/backend/x86/test/test_rx86_64_auto_encoding.py
--- a/rpython/jit/backend/x86/test/test_rx86_64_auto_encoding.py
+++ b/rpython/jit/backend/x86/test/test_rx86_64_auto_encoding.py
@@ -51,3 +51,19 @@
     def test_extra_MOV_ri64(self):
         self.imm32_tests = self.imm64_tests      # patch on 'self'
         self.complete_test('MOV_ri')
+
+    def rip_relative_tests(self):
+        return [-0x80000000, 0x7FFFFFFF, 128, 256, -129, -255, 0, 127]
+
+    def get_all_tests(self):
+        d = super(TestRx86_64, self).get_all_tests()
+        d['p'] = self.rip_relative_tests
+        return d
+
+    def assembler_operand_rip_relative(self, value):
+        return '%d(%%rip)' % value
+
+    def get_all_assembler_operands(self):
+        d = super(TestRx86_64, self).get_all_assembler_operands()
+        d['p'] = self.assembler_operand_rip_relative
+        return d


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