[pypy-commit] pypy jit-leaner-frontend: more fixes, at least starts backend tests
fijal
pypy.commits at gmail.com
Tue Mar 22 14:29:02 EDT 2016
Author: fijal
Branch: jit-leaner-frontend
Changeset: r83272:88e0e2f821e2
Date: 2016-03-22 20:28 +0200
http://bitbucket.org/pypy/pypy/changeset/88e0e2f821e2/
Log: more fixes, at least starts backend tests
diff --git a/rpython/jit/backend/llsupport/regalloc.py b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -683,7 +683,7 @@
for i in range(len(operations)-1, -1, -1):
op = operations[i]
if op.type != 'v':
- if op not in last_used and op.has_no_side_effect():
+ if op not in last_used and rop.has_no_side_effect(op.opnum):
continue
opnum = op.getopnum()
for j in range(op.numargs()):
diff --git a/rpython/jit/backend/llsupport/rewrite.py b/rpython/jit/backend/llsupport/rewrite.py
--- a/rpython/jit/backend/llsupport/rewrite.py
+++ b/rpython/jit/backend/llsupport/rewrite.py
@@ -103,7 +103,7 @@
orig_op.set_forwarded(op)
replaced = True
op.setarg(i, arg)
- if op.is_guard():
+ if rop.is_guard(op.opnum):
if not replaced:
op = op.copy_and_change(op.getopnum())
orig_op.set_forwarded(op)
@@ -203,7 +203,7 @@
def transform_to_gc_load(self, op):
NOT_SIGNED = 0
CINT_ZERO = ConstInt(0)
- if op.is_getarrayitem() or \
+ if rop.is_getarrayitem(op.opnum) or \
op.getopnum() in (rop.GETARRAYITEM_RAW_I,
rop.GETARRAYITEM_RAW_F):
self.handle_getarrayitem(op)
@@ -315,13 +315,13 @@
if self.transform_to_gc_load(op):
continue
# ---------- turn NEWxxx into CALL_MALLOC_xxx ----------
- if op.is_malloc():
+ if rop.is_malloc(op.opnum):
self.handle_malloc_operation(op)
continue
- if (op.is_guard() or
+ if (rop.is_guard(op.opnum) or
self.could_merge_with_next_guard(op, i, operations)):
self.emit_pending_zeros()
- elif op.can_malloc():
+ elif rop.can_malloc(op.opnum):
self.emitting_an_operation_that_can_collect()
elif op.getopnum() == rop.LABEL:
self.emitting_an_operation_that_can_collect()
diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -357,7 +357,7 @@
assert self.assembler.mc._frame_size == DEFAULT_FRAME_BYTES
self.rm.position = i
self.xrm.position = i
- if op.has_no_side_effect() and op not in self.longevity:
+ if rop.has_no_side_effect(op.opnum) and op not in self.longevity:
i += 1
self.possibly_free_vars_for_op(op)
continue
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