[pypy-commit] pypy s390x-backend: made register r13 dirty before flushing the non volatile registers to the stack,

[plan_rich]

Author: Richard Plangger <planrichi at gmail.com>
Branch: s390x-backend
Changeset: r81884:f5ab3026a4db
Date: 2016-01-21 10:08 +0100
http://bitbucket.org/pypy/pypy/changeset/f5ab3026a4db/

Log:	made register r13 dirty before flushing the non volatile registers
	to the stack, it seems that this cannot happen in the test suite
	because it is either ffi/ctypes that restores a constant r13 after
	the call and the translated tests might not need r13 after finishing
	the jit code

diff --git a/rpython/jit/backend/zarch/assembler.py b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -633,7 +633,6 @@
                                            looptoken, clt.allgcrefs)
         self.pool.pre_assemble(self, operations)
         entrypos = self.mc.get_relative_pos()
-        self.mc.LARL(r.POOL, l.halfword(self.pool.pool_start - entrypos))
         self._call_header_with_stack_check()
         looppos = self.mc.get_relative_pos()
         frame_depth_no_fixed_size = self._assemble(regalloc, inputargs,
@@ -1000,6 +999,7 @@
     def _call_header(self):
         # Build a new stackframe of size STD_FRAME_SIZE_IN_BYTES
         self.mc.STMG(r.r6, r.r15, l.addr(6*WORD, r.SP))
+        self.mc.LARL(r.POOL, l.halfword(self.pool.pool_start - self.mc.get_relative_pos()))
         # save the back chain
         self.mc.STG(r.SP, l.addr(0, r.SP))