[pypy-commit] pypy fix-longevity: (plan_rich, remi) add additional arg to LiveRanges() in test and fix test
Raemi
pypy.commits at gmail.com
Thu Feb 25 11:03:58 EST 2016
Author: Remi Meier <remi.meier at gmail.com>
Branch: fix-longevity
Changeset: r82514:46c6887af094
Date: 2016-02-25 17:03 +0100
http://bitbucket.org/pypy/pypy/changeset/46c6887af094/
Log: (plan_rich,remi) add additional arg to LiveRanges() in test and fix
test
diff --git a/rpython/jit/backend/llsupport/regalloc.py b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -643,9 +643,10 @@
self.assembler.regalloc_mov(prev_loc, loc)
def force_result_in_reg(self, result_v, v, forbidden_vars=[]):
- """ Make sure that result is in the same register as v.
- The variable v is copied away if it's further used. The meaning
- of 'forbidden_vars' is the same as in 'force_allocate_reg'.
+ """ Allocate a register for result_v and copy the contents of v's
+ register to result_v's register. v will stay in the register it
+ was initially assigned to. The meaning of 'forbidden_vars' is the
+ same as in 'force_allocate_reg'.
"""
self._check_type(result_v)
self._check_type(v)
@@ -803,6 +804,9 @@
self.longevity[var] = (start, end)
def get_call_argument_index(self, var, pos):
+ if not we_are_translated(): # tests
+ if self.dist_to_next_call is None:
+ return -1
dist_to_call = self.dist_to_next_call[pos]
if dist_to_call < 0:
return -1
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc.py b/rpython/jit/backend/llsupport/test/test_regalloc.py
--- a/rpython/jit/backend/llsupport/test/test_regalloc.py
+++ b/rpython/jit/backend/llsupport/test/test_regalloc.py
@@ -78,7 +78,7 @@
def test_freeing_vars(self):
b0, b1, b2 = newboxes(0, 0, 0)
longevity = {b0: (0, 1), b1: (0, 2), b2: (0, 2)}
- rm = RegisterManager(LiveRanges(longevity, None, None))
+ rm = RegisterManager(LiveRanges(longevity, None, None, None))
rm.next_instruction()
for b in b0, b1, b2:
rm.try_allocate_reg(b)
@@ -103,7 +103,7 @@
def test_register_exhaustion(self):
boxes, longevity = boxes_and_longevity(5)
- rm = RegisterManager(LiveRanges(longevity, None, None))
+ rm = RegisterManager(LiveRanges(longevity, None, None, None))
rm.next_instruction()
for b in boxes[:len(regs)]:
assert rm.try_allocate_reg(b)
@@ -117,7 +117,7 @@
class XRegisterManager(RegisterManager):
no_lower_byte_regs = [r2, r3]
- rm = XRegisterManager(LiveRanges(longevity, None, None))
+ rm = XRegisterManager(LiveRanges(longevity, None, None, None))
rm.next_instruction()
loc0 = rm.try_allocate_reg(b0, need_lower_byte=True)
assert loc0 not in XRegisterManager.no_lower_byte_regs
@@ -131,7 +131,7 @@
def test_specific_register(self):
boxes, longevity = boxes_and_longevity(5)
- rm = RegisterManager(LiveRanges(longevity, None, None))
+ rm = RegisterManager(LiveRanges(longevity, None, None, None))
rm.next_instruction()
loc = rm.try_allocate_reg(boxes[0], selected_reg=r1)
assert loc is r1
@@ -152,7 +152,7 @@
class XRegisterManager(RegisterManager):
no_lower_byte_regs = [r2, r3]
- rm = XRegisterManager(LiveRanges(longevity, None, None),
+ rm = XRegisterManager(LiveRanges(longevity, None, None, None),
frame_manager=fm,
assembler=MockAsm())
rm.next_instruction()
@@ -178,7 +178,7 @@
def test_make_sure_var_in_reg(self):
boxes, longevity = boxes_and_longevity(5)
fm = TFrameManager()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm,
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm,
assembler=MockAsm())
rm.next_instruction()
# allocate a stack position
@@ -194,7 +194,7 @@
longevity = {b0: (0, 1), b1: (1, 3)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.next_instruction()
# first path, var is already in reg and dies
loc0 = rm.force_allocate_reg(b0)
@@ -210,14 +210,15 @@
longevity = {b0: (0, 2), b1: (1, 3)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.next_instruction()
loc0 = rm.force_allocate_reg(b0)
rm._check_invariants()
rm.next_instruction()
loc = rm.force_result_in_reg(b1, b0)
- assert loc is loc0
- assert rm.loc(b0) is not loc0
+ assert loc is not loc0
+ assert rm.loc(b0) is not loc
+ assert rm.loc(b0) is loc0
assert len(asm.moves) == 1
rm._check_invariants()
@@ -226,7 +227,7 @@
longevity = {b0: (0, 2), b1: (0, 2), b3: (0, 2), b2: (0, 2), b4: (1, 3)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.next_instruction()
for b in b0, b1, b2, b3:
rm.force_allocate_reg(b)
@@ -242,7 +243,7 @@
longevity = {b0: (0, 1), b1: (0, 1)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.next_instruction()
fm.loc(b0)
rm.force_result_in_reg(b1, b0)
@@ -258,7 +259,7 @@
longevity = {b0: (0, 1), b1: (0, 1)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.free_callee_regs = rm.free_callee_regs[:1]
rm.all_regs = rm.free_callee_regs[:]
rm.next_instruction()
@@ -276,7 +277,7 @@
longevity = {b0: (0, 1)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.next_instruction()
# invalid call to make_sure_var_in_reg(): box unknown so far
py.test.raises(KeyError, rm.make_sure_var_in_reg, b0)
@@ -285,7 +286,7 @@
asm = MockAsm()
boxes, longevity = boxes_and_longevity(5)
fm = TFrameManager()
- rm = RegisterManager(LiveRanges(longevity, None, None), assembler=asm,
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), assembler=asm,
frame_manager=fm)
rm.next_instruction()
loc = rm.return_constant(ConstInt(1), selected_reg=r1)
@@ -304,7 +305,7 @@
boxes, longevity = boxes_and_longevity(2)
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm,
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm,
assembler=asm)
rm.next_instruction()
c = ConstInt(0)
@@ -326,7 +327,7 @@
fm = TFrameManager()
asm = MockAsm()
boxes, longevity = boxes_and_longevity(5)
- rm = XRegisterManager(LiveRanges(longevity, None, None), frame_manager=fm,
+ rm = XRegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm,
assembler=asm)
for b in boxes[:-1]:
rm.force_allocate_reg(b)
@@ -349,7 +350,7 @@
fm = TFrameManager()
asm = MockAsm()
boxes, longevity = boxes_and_longevity(5)
- rm = XRegisterManager(LiveRanges(longevity, None, None), frame_manager=fm,
+ rm = XRegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm,
assembler=asm)
for b in boxes[:-1]:
rm.force_allocate_reg(b)
@@ -371,10 +372,10 @@
b0 = InputArgInt()
longevity = {b0: (0, 1)}
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
f0 = InputArgFloat()
longevity = {f0: (0, 1)}
- xrm = XRegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ xrm = XRegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
xrm.loc(f0)
rm.loc(b0)
assert fm.get_frame_depth() == 3
@@ -384,7 +385,7 @@
longevity = {b0: (0, 3), b1: (0, 3), b3: (0, 5), b2: (0, 2), b4: (1, 4), b5: (1, 3)}
fm = TFrameManager()
asm = MockAsm()
- rm = RegisterManager(LiveRanges(longevity, None, None), frame_manager=fm, assembler=asm)
+ rm = RegisterManager(LiveRanges(longevity, None, None, None), frame_manager=fm, assembler=asm)
rm.next_instruction()
for b in b0, b1, b2, b3:
rm.force_allocate_reg(b)
More information about the pypy-commit
mailing list