[pypy-commit] pypy default: (s390x) execute patch_stack_checks before materialize loop, translation issue fixed

plan_rich pypy.commits at gmail.com
Tue Apr 12 10:24:01 EDT 2016


Author: Richard Plangger <planrichi at gmail.com>
Branch: 
Changeset: r83617:4fd5a8562c39
Date: 2016-04-12 16:23 +0200
http://bitbucket.org/pypy/pypy/changeset/4fd5a8562c39/

Log:	(s390x) execute patch_stack_checks before materialize loop,
	translation issue fixed

diff --git a/rpython/jit/backend/zarch/assembler.py b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -644,6 +644,7 @@
         full_size = self.mc.get_relative_pos()
         #
         self.patch_stack_checks(frame_depth_no_fixed_size + JITFRAME_FIXED_SIZE)
+        #
         if not we_are_translated():
             self.mc.trap() # should be never reached
         rawstart = self.materialize_loop(looptoken)
@@ -706,8 +707,8 @@
         operations = regalloc.prepare_bridge(inputargs, arglocs,
                                              operations, allgcrefs,
                                              self.current_clt.frame_info)
-        startpos = len(allgcrefs) * WORD
         self.pool.pre_assemble(self, operations, allgcrefs, bridge=True)
+        startpos = self.mc.get_relative_pos()
         self._check_frame_depth(self.mc, regalloc.get_gcmap())
         bridgestartpos = self.mc.get_relative_pos()
         self.mc.LARL(r.POOL, l.halfword(self.pool.pool_start - bridgestartpos))
@@ -717,9 +718,10 @@
         self.write_pending_failure_recoveries()
         fullsize = self.mc.get_relative_pos()
         #
+        self.patch_stack_checks(frame_depth_no_fixed_size + JITFRAME_FIXED_SIZE)
+        #
         rawstart = self.materialize_loop(original_loop_token)
         self.patch_gcref_table(original_loop_token, rawstart)
-        self.patch_stack_checks(frame_depth_no_fixed_size + JITFRAME_FIXED_SIZE)
         debug_start("jit-backend-addr")
         debug_print("bridge out of Guard 0x%x has address 0x%x to 0x%x" %
                     (r_uint(descr_number), r_uint(rawstart + startpos),
@@ -742,7 +744,7 @@
         self.fixup_target_tokens(rawstart)
         self.update_frame_depth(frame_depth)
         self.teardown()
-        return AsmInfo(ops_offset, startpos + rawstart, codeendpos - startpos,
+        return AsmInfo(ops_offset, rawstart + startpos, codeendpos - startpos,
                        rawstart + bridgestartpos)
 
     def patch_gcref_table(self, looptoken, rawstart):
diff --git a/rpython/jit/backend/zarch/pool.py b/rpython/jit/backend/zarch/pool.py
--- a/rpython/jit/backend/zarch/pool.py
+++ b/rpython/jit/backend/zarch/pool.py
@@ -11,6 +11,9 @@
 from rpython.jit.backend.zarch.arch import (WORD,
         RECOVERY_GCMAP_POOL_OFFSET, RECOVERY_TARGET_POOL_OFFSET)
 from rpython.rlib.longlong2float import float2longlong
+from rpython.jit.metainterp.history import (ConstFloat,
+        ConstInt, ConstPtr)
+
 
 class PoolOverflow(Exception):
     pass
@@ -58,14 +61,14 @@
         return self.offset_map[uvalue]
 
     def unique_value(self, val):
-        if val.type == FLOAT:
+        if isinstance(val, ConstFloat):
             if val.getfloat() == 0.0:
                 return 0
             return float2longlong(val.getfloat())
-        elif val.type == INT:
+        elif isinstance(val, ConstInt):
             return rffi.cast(lltype.Signed, val.getint())
         else:
-            assert val.type == REF
+            assert isinstance(val, ConstPtr)
             return rffi.cast(lltype.Signed, val.getref_base())
 
     def reserve_literal(self, size, box, asm):
diff --git a/rpython/jit/backend/zarch/test/test_runner.py b/rpython/jit/backend/zarch/test/test_runner.py
--- a/rpython/jit/backend/zarch/test/test_runner.py
+++ b/rpython/jit/backend/zarch/test/test_runner.py
@@ -25,5 +25,5 @@
         return cpu
 
     add_loop_instructions = "lg; lgr; larl; agr; cgfi; jge; j;$"
-    bridge_loop_instructions = "larl; lg; cgfi; jnl; lghi; " \
-                               "(lgfi|iilf);( iihf;)? (lgfi|iilf);( iihf;)? basr; (lgfi|iilf);( iihf;)? br;$"
+    bridge_loop_instructions = "lg; cgfi; jnl; lghi; " \
+                               "(lgfi|iilf);( iihf;)? (lgfi|iilf);( iihf;)? basr; larl; (lgfi|iilf);( iihf;)? br;$"


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