[pypy-commit] pypy s390x-backend: added ss_d, ss_e, ss_f. now the a subset of the whole range is taken as paramters testing the corner cases better in the assembler (e.g. immediate 8 bit [-128, -1, 0, 1, 127] + some random inbetween -128 and 127)
plan_rich
noreply at buildbot.pypy.org
Thu Oct 15 12:47:04 EDT 2015
Author: Richard Plangger <planrichi at gmail.com>
Branch: s390x-backend
Changeset: r80244:b3805605f684
Date: 2015-10-15 18:47 +0200
http://bitbucket.org/pypy/pypy/changeset/b3805605f684/
Log: added ss_d, ss_e, ss_f. now the a subset of the whole range is taken
as paramters testing the corner cases better in the assembler (e.g.
immediate 8 bit [-128,-1,0,1,127] + some random inbetween -128 and
127)
diff --git a/rpython/jit/backend/zarch/codebuilder.py b/rpython/jit/backend/zarch/codebuilder.py
--- a/rpython/jit/backend/zarch/codebuilder.py
+++ b/rpython/jit/backend/zarch/codebuilder.py
@@ -28,11 +28,24 @@
pass
def arguments(args_str):
+ """
+ Available names:
+ r - register
+ i4 - immediate 4 bits (signed)
+ u4 - immediate 4 bits (unsigend)
+ bd - base displacement
+ l4db - length base displacement (4 bit)
+ l8db - length base displacement (8 bit)
+ """
def impl(func):
func._arguments_ = args_str.split(',')
return func
return impl
+BIT_MASK_4 = 0xF
+BIT_MASK_12 = 0xFFF
+BIT_MASK_20 = 0xFFFFF
+
@always_inline
def encode_base_displace(mc, base_displace):
displace = base_displace.displace # & 0x3ff
@@ -64,7 +77,7 @@
index = idxbasedisp.index
byte = (reg_or_mask & 0x0f) << 4 | index & 0xf
self.writechar(chr(byte))
- displace = idxbasedisp.displace & 0x3ff
+ displace = idxbasedisp.displace & BIT_MASK_12
base = idxbasedisp.base & 0xf
byte = displace >> 8 & 0xf | base << 4
self.writechar(chr(byte))
@@ -77,12 +90,13 @@
index = idxbasedisp.index
byte = (reg_or_mask & 0x0f) << 4 | index & 0xf
self.writechar(chr(byte))
- displace = idxbasedisp.displace & 0x3ff
+ displace = idxbasedisp.displace & 0xfffff
base = idxbasedisp.base & 0xf
byte = displace >> 8 & 0xf | base << 4
self.writechar(chr(byte))
self.writechar(chr(displace & 0xff))
- self.writechar(chr(displace >> 12 & 0xff))
+ byte = displace >> 12 & 0xff
+ self.writechar(chr(byte))
self.writechar(opcode2)
return encode_rxy
@@ -130,7 +144,7 @@
return encode_ssb
def build_ssc(mnemonic, (opcode1,)):
- @arguments('l,l,u4')
+ @arguments('lbp,lbp,u4')
def encode_ssc(self, len_base_disp1, len_base_disp2, uimm4):
self.writechar(opcode1)
byte = (len_base_disp1.length & 0xf) << 4 | uimm4 & 0xf
@@ -139,6 +153,34 @@
encode_base_displace(self, len_base_disp2)
return encode_ssc
+def build_ssd(mnemonic, (opcode,)):
+ @arguments('rbd,bd,r')
+ def encode_ssd(self, index_base_disp, base_disp, reg):
+ self.writechar(opcode)
+ byte = (index_base_disp.index & 0xf) << 4 | reg & 0xf
+ self.writechar(chr(byte))
+ encode_base_displace(self, index_base_disp)
+ encode_base_displace(self, base_disp)
+ return encode_ssd
+
+def build_sse(mnemonic, (opcode,)):
+ @arguments('r,bd,r,bd')
+ def encode_sse(self, reg1, reg3, base_disp2, base_disp4):
+ self.writechar(opcode)
+ byte = (reg1 & BIT_MASK_4) << 4 | reg3 & BIT_MASK_4
+ self.writechar(chr(byte))
+ encode_base_displace(self, base_disp2)
+ encode_base_displace(self, base_disp4)
+ return encode_sse
+
+def build_ssf(mnemonic, (opcode,)):
+ def encode_ssf(self, base_disp, len_base_disp):
+ self.writechar(opcode)
+ self.writechar(chr(len_base_disp.length & 0xff))
+ encode_base_displace(self, base_disp)
+ encode_base_displace(self, len_base_disp)
+ return encode_ssf
+
_mnemonic_codes = {
'AR': (build_rr, ['\x1A']),
'AGR': (build_rre, ['\xB9\x08']),
@@ -153,6 +195,9 @@
'NC': (build_ssa, ['\xD4']),
'AP': (build_ssb, ['\xFA']),
'SRP': (build_ssc, ['\xF0']),
+ 'MVCK': (build_ssd, ['\xD9']),
+ 'LMD': (build_sse, ['\xEF']),
+ 'PKA': (build_ssf, ['\xE9']),
}
def build_instr_codes(clazz):
diff --git a/rpython/jit/backend/zarch/test/test_auto_encoding.py b/rpython/jit/backend/zarch/test/test_auto_encoding.py
--- a/rpython/jit/backend/zarch/test/test_auto_encoding.py
+++ b/rpython/jit/backend/zarch/test/test_auto_encoding.py
@@ -29,7 +29,8 @@
return # ignore the extra character '\x40'
print self.op
post = self.expected[self.index+1:self.index+1+15]
- generated = "\x09from codebuilder.py: " + hexdump(self.expected[self.instrindex:self.index] + char )+"..."
+ generated = "\x09from codebuilder.py: " + hexdump(self.expected[self.instrindex:self.index]) + "!" + \
+ hexdump([char])+ "!" +hexdump(post)
print generated
expected = "\x09from gnu as: " + hexdump(self.expected[self.instrindex:self.index+15])+"..."
print expected
@@ -76,6 +77,8 @@
base = self.base
return "{disp}(%r{index},%r{base})".format(**locals())
+ __repr__ = __str__
+
class FakeBaseDisplace(object):
def __init__(self, base, disp):
self.base = base
@@ -86,6 +89,8 @@
base = self.base
return "{disp}(%r{base})".format(**locals())
+ __repr__ = __str__
+
class FakeLengthBaseDisplace(object):
def __init__(self, len, base, disp):
self.length = len
@@ -98,27 +103,27 @@
length = self.length + 1
return "{disp}({length},%r{base})".format(**locals())
-def build_base_disp(base_bits, displace_bits):
- possibilities = itertools.product(range(base_bits), range(displace_bits))
+ __repr__ = __str__
+
+def test_range(bits, signed=False, count=24):
+ if isinstance(bits, tuple):
+ bits, signed = bits
+ if signed:
+ bits -= 1
+ maximum = 2**bits
+ return [-maximum,-1,0,1,maximum-1] + [random.randrange(-maximum,maximum) for i in range(count)]
+ maximum = 2**bits
+ return [0,1,maximum-1] + [random.randrange(0,maximum) for i in range(count)]
+
+def build_fake(clazz, *arg_bits):
+ possibilities = itertools.product(*[test_range(b) for b in arg_bits])
results = []
- for (base,disp) in possibilities:
- results.append(FakeBaseDisplace(base,disp))
- return results
-
-def build_idx_base_disp(index_bits, base_bits, displace_bits):
- possibilities = itertools.product(range(index_bits), range(base_bits),
- range(displace_bits))
- results = []
- for (index,base,disp) in possibilities:
- results.append(FakeIndexBaseDisplace(index,base,disp))
- return results
-
-def build_len_base_disp(len_bits, base_bits, displace_bits):
- possibilities = itertools.product(range(len_bits), range(base_bits),
- range(displace_bits))
- results = []
- for (length,base,disp) in possibilities:
- results.append(FakeLengthBaseDisplace(length,base,disp))
+ i = 0
+ for args in possibilities:
+ results.append(clazz(*args))
+ i+=1
+ if i > 20:
+ break
return results
class TestZARCH(object):
@@ -128,12 +133,12 @@
REGNAMES = ['%%r%d' % i for i in REGS]
accept_unnecessary_prefix = None
methname = '?'
- BASE_DISPLACE = build_base_disp(8,12)
- BASE_DISPLACE_LONG = build_base_disp(8,20)
- INDEX_BASE_DISPLACE = build_idx_base_disp(8,8,12)
- INDEX_BASE_DISPLACE_LONG = build_idx_base_disp(8,8,20)
- LENGTH4_BASE_DISPLACE = build_len_base_disp(4,8,12)
- LENGTH8_BASE_DISPLACE = build_len_base_disp(8,8,12)
+ BASE_DISPLACE = build_fake(FakeBaseDisplace,4,12)
+ BASE_DISPLACE_LONG = build_fake(FakeBaseDisplace,4,(20,True))
+ INDEX_BASE_DISPLACE = build_fake(FakeIndexBaseDisplace,4,4,12)
+ INDEX_BASE_DISPLACE_LONG = build_fake(FakeIndexBaseDisplace,4,4,(20,True))
+ LENGTH4_BASE_DISPLACE = build_fake(FakeLengthBaseDisplace,4,4,12)
+ LENGTH8_BASE_DISPLACE = build_fake(FakeLengthBaseDisplace,8,4,12)
def reg_tests(self):
return self.REGS
@@ -172,32 +177,12 @@
assert match
return getattr(self, match.group(1) + "_tests")()
- def uimm16_tests(self):
- v = ([0,1,65535] +
- [random.randrange(0,65535) for i in range(COUNT1)])
- return v
- def imm16_tests(self):
- v = ([-32768,-1,0,1,32767] +
- [random.randrange(-32768, 32767) for i in range(COUNT1)])
- return v
-
- def imm8_tests(self):
- v = ([-128,-1,0,1,127] +
- [random.randrange(-127, 127) for i in range(COUNT1)])
- return v
- def uimm8_tests(self):
- v = ([0,1,255] +
- [random.randrange(0,255) for i in range(COUNT1)])
- return v
- def uimm4_tests(self):
- return list(range(0,16))
-
- def imm32_tests(self):
- v = ([-0x80000000, 0x7FFFFFFF, 128, 256, -129, -255] +
- [random.randrange(-32768,32768)<<16 |
- random.randrange(0,65536) for i in range(COUNT1)] +
- [random.randrange(128, 256) for i in range(COUNT1)])
- return self.imm8_tests() + v
+ def uimm16_tests(self): return test_range(16)
+ def imm16_tests(self): return test_range(16,signed=True)
+ def imm8_tests(self): return test_range(8,signed=True)
+ def uimm8_tests(self): return test_range(8)
+ def uimm4_tests(self): return test_range(4)
+ def imm32_tests(self): return test_range(32, signed=True)
def relative_tests(self):
py.test.skip("explicit test required for %r" % (self.methname,))
@@ -218,14 +203,15 @@
def operand_combinations(self, modes, arguments):
remap = {
+ 'rre': 'rr',
'rxy': 'rx',
'siy': 'si',
- 'rre': 'rr',
'ssa': 'Ls',
'ssb': 'll',
'ssc': 'lsi',
'ssd': 'xsr',
'sse': 'rrss',
+ 'ssf': 'sL',
}
mapping = self.get_mapping_asm_to_str()
modes = remap.get(modes, modes)
@@ -302,6 +288,9 @@
'ssa': (tests['L'], tests['s']),
'ssb': (tests['l'], tests['l']),
'ssc': (tests['l'], tests['s'], tests['i']),
+ 'ssd': (tests['x'], tests['s'], tests['r']),
+ 'sse': (tests['r'], tests['r'], tests['s'], tests['s']),
+ 'ssf': (tests['s'], tests['L']),
}
if modes in tests_all:
combinations = [f(i) for i,f in enumerate(tests_all[modes])]
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