[pypy-commit] pypy s390x-backend: implementing card_masking_mask assembler in _write_barrier_fast_path
plan_rich
pypy.commits at gmail.com
Thu Dec 17 06:54:26 EST 2015
Author: Richard Plangger <planrichi at gmail.com>
Branch: s390x-backend
Changeset: r81366:a74573715f49
Date: 2015-12-17 12:53 +0100
http://bitbucket.org/pypy/pypy/changeset/a74573715f49/
Log: implementing card_masking_mask assembler in _write_barrier_fast_path
diff --git a/rpython/jit/backend/zarch/assembler.py b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -169,8 +169,7 @@
self.mc = mc
# save the information
- mc.STG(r.r14, l.addr(14*WORD, r.SP))
- # no need to store the back chain ? mc.STG(r.SP, l.addr(0, r.SP)) # store the backchain
+ mc.STG(r.r14, l.addr(14*WORD, r.SP)) # save the link
LOCAL_VARS_OFFSET = 0
extra_stack_size = LOCAL_VARS_OFFSET + 4 * WORD + 8
@@ -222,12 +221,11 @@
# of _reload_frame_if_necessary)
# This trashes r0 and r2, which is fine in this case
assert argument_loc is not r.r0
- # XXX TODO
+ xxx
#self._store_and_reset_exception(mc, r.RCS2, r.RCS3)
if withcards:
- # XXX TODO
- pass
+ xxx
#kmc.mr(r.RCS2.value, argument_loc.value)
#
# Save the lr into r.RCS1
@@ -242,11 +240,9 @@
mc.LGR(r.r2, argument_loc)
mc.raw_call()
mc.AGHI(r.SP, l.imm(STD_FRAME_SIZE_IN_BYTES))
- #
- # Restore lr
- # TODO mc.mtlr(r.RCS1.value)
if for_frame:
+ xxx
self._restore_exception(mc, r.RCS2, r.RCS3)
if withcards:
@@ -271,9 +267,8 @@
self._pop_core_regs_from_jitframe(mc, saved_regs)
self._pop_fp_regs_from_jitframe(mc, saved_fp_regs)
- mc.LG(r.r14, l.addr(14*WORD, r.SP))
+ mc.LG(r.r14, l.addr(14*WORD, r.SP)) # restore the link
mc.BCR(c.ANY, r.RETURN)
- #mc.blr()
self.mc = old_mc
rawstart = mc.materialize(self.cpu, [])
diff --git a/rpython/jit/backend/zarch/instruction_builder.py b/rpython/jit/backend/zarch/instruction_builder.py
--- a/rpython/jit/backend/zarch/instruction_builder.py
+++ b/rpython/jit/backend/zarch/instruction_builder.py
@@ -322,6 +322,18 @@
self.writechar(opcode2)
return encode_rie_e
+def build_rie_f(mnemonic, (opcode1,opcode2)):
+ @builder.arguments('r,r,i8,i8,i8')
+ def encode_rie_f(self, reg1, reg2, i1, i2, i3):
+ self.writechar(opcode1)
+ byte = (reg1 & BIT_MASK_4) << 4 | (reg2 & BIT_MASK_4)
+ self.writechar(chr(byte))
+ self.writechar(chr(i1))
+ self.writechar(chr(i2))
+ self.writechar(chr(i3))
+ self.writechar(opcode2)
+ return encode_rie_f
+
def build_rie_a(mnemonic, (opcode1,opcode2)):
br = is_branch_relative(mnemonic)
@builder.arguments('r,i16,r/m')
diff --git a/rpython/jit/backend/zarch/instructions.py b/rpython/jit/backend/zarch/instructions.py
--- a/rpython/jit/backend/zarch/instructions.py
+++ b/rpython/jit/backend/zarch/instructions.py
@@ -39,6 +39,10 @@
'SRLG': ('rsy_a', ['\xEB','\x0C']),
'SLLG': ('rsy_a', ['\xEB','\x0D']),
+ # rotating
+ # rotate, then insert selected bits
+ 'RISBGN': ('rie_f', ['\xEC','\x59']),
+
# invert & negative & absolute
'LPGR': ('rre', ['\xB9','\x00']),
'LNGR': ('rre', ['\xB9','\x01']),
diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -476,27 +476,32 @@
# directly the card flag setting
loc_index = arglocs[1]
if loc_index.is_reg():
- xxx
tmp_loc = arglocs[2]
n = descr.jit_wb_card_page_shift
# compute in tmp_loc the byte offset:
# ~(index >> (card_page_shift + 3)) ('~' is 'not_' below)
- mc.srli_op(tmp_loc.value, loc_index.value, n + 3)
+ mc.SRAG(tmp_loc, loc_index, l.addr(n+3))
+ #mc.srli_op(tmp_loc.value, loc_index.value, n + 3)
+ # invert the bits
+ mc.XIHF(tmp_loc, l.imm(0xffffFFFF))
+ mc.XILF(tmp_loc, l.imm(0xffffFFFF))
# compute in r2 the index of the bit inside the byte:
# (index >> card_page_shift) & 7
- mc.rldicl(r.SCRATCH2.value, loc_index.value, 64 - n, 61)
- mc.li(r.SCRATCH.value, 1)
- mc.not_(tmp_loc.value, tmp_loc.value)
+ # 0x80 sets zero flag. will store 0 into all selected bits
+ mc.RISBGN(r.SCRATCH2, loc_index, l.imm(3), l.imm(0x80 | 63), l.imm(61))
+ #mc.rldicl(r.SCRATCH2.value, loc_index.value, 64 - n, 61)
# set r2 to 1 << r2
- mc.sl_op(r.SCRATCH2.value, r.SCRATCH.value, r.SCRATCH2.value)
+ mc.LGHI(r.SCRATCH, l.imm(1))
+ mc.SLAG(r.SCRATCH2, r.SCRATCH, l.addr(0,r.SCRATCH2))
# set this bit inside the byte of interest
- mc.lbzx(r.SCRATCH.value, loc_base.value, tmp_loc.value)
- mc.or_(r.SCRATCH.value, r.SCRATCH.value, r.SCRATCH2.value)
- mc.stbx(r.SCRATCH.value, loc_base.value, tmp_loc.value)
+ addr = l.addr(0, loc_base, tmp_loc)
+ mc.LLGC(r.SCRATCH, addr)
+ mc.OGR(r.SCRATCH, r.SCRATCH2)
+ mc.STCY(r.SCRATCH, addr)
# done
else:
@@ -505,9 +510,10 @@
byte_val = 1 << (byte_index & 7)
assert check_imm_value(byte_ofs)
- mc.lbz(r.SCRATCH.value, loc_base.value, byte_ofs)
- mc.ori(r.SCRATCH.value, r.SCRATCH.value, byte_val)
- mc.stb(r.SCRATCH.value, loc_base.value, byte_ofs)
+ addr = l.addr(byte_ofs, loc_base)
+ mc.LLGC(r.SCRATCH, addr)
+ mc.OILL(r.SCRATCH, l.imm(byte_val))
+ mc.STCY(r.SCRATCH, addr)
#
# patch the beq just above
currpos = mc.currpos()
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