[pypy-commit] pypy default: increase the resistance of this test (a bit)

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: 
Changeset: r73314:9de2b25ab1f6
Date: 2014-09-05 10:40 +0200
http://bitbucket.org/pypy/pypy/changeset/9de2b25ab1f6/

Log:	increase the resistance of this test (a bit)

diff --git a/pypy/module/thread/test/test_thread.py b/pypy/module/thread/test/test_thread.py
--- a/pypy/module/thread/test/test_thread.py
+++ b/pypy/module/thread/test/test_thread.py
@@ -227,7 +227,7 @@
         import signal
 
         def f():
-            for x in range(5):
+            for x in range(40):
                 if waiting:
                     thread.interrupt_main()
                     return
@@ -236,7 +236,7 @@
 
         def busy_wait():
             waiting.append(None)
-            for x in range(10):
+            for x in range(50):
                 print 'tick...', x  # <-force the GIL to be released, as
                 time.sleep(0.1)    #   time.sleep doesn't do non-translated
             waiting.pop()
@@ -245,6 +245,8 @@
         signal.signal(signal.SIGINT, signal.default_int_handler)
 
         for i in range(100):
+            print
+            print "loop", i
             waiting = []
             thread.start_new_thread(f, ())
             raises(KeyboardInterrupt, busy_wait)