[pypy-commit] pypy stmgc-c7: fixes
arigo
noreply at buildbot.pypy.org
Wed Nov 12 13:41:24 CET 2014
Author: Armin Rigo <arigo at tunes.org>
Branch: stmgc-c7
Changeset: r74480:5018a9c8a064
Date: 2014-11-12 13:24 +0100
http://bitbucket.org/pypy/pypy/changeset/5018a9c8a064/
Log: fixes
diff --git a/rpython/jit/backend/x86/callbuilder.py b/rpython/jit/backend/x86/callbuilder.py
--- a/rpython/jit/backend/x86/callbuilder.py
+++ b/rpython/jit/backend/x86/callbuilder.py
@@ -109,7 +109,7 @@
if gcrootmap:
if gcrootmap.is_shadow_stack:
rst = gcrootmap.get_root_stack_top_addr()
- self.mc.MOV(ebx, heap(rst))
+ self.mc.MOV(ebx, self.asm.heap_tl(rst))
#
if self.asm.cpu.gc_ll_descr.stm:
self.call_stm_before_ex_call()
@@ -207,12 +207,12 @@
# here, ecx is zero (so rpy_fastgil was not acquired)
rst = gcrootmap.get_root_stack_top_addr()
mc = self.mc
- mc.CMP(ebx, heap(rst))
+ mc.CMP(ebx, self.asm.heap_tl(rst))
mc.J_il8(rx86.Conditions['E'], 0)
je_location = mc.get_relative_pos()
# revert the rpy_fastgil acquired above, so that the
# general 'reacqgil_addr' below can acquire it again...
- mc.MOV(heap(fastgil), ecx)
+ mc.MOV(heap(self.asm.SEGMENT_NO, fastgil), ecx)
# patch the JNE above
offset = mc.get_relative_pos() - jne_location
assert 0 < offset <= 127
diff --git a/rpython/jit/backend/x86/test/test_stm_integration.py b/rpython/jit/backend/x86/test/test_stm_integration.py
--- a/rpython/jit/backend/x86/test/test_stm_integration.py
+++ b/rpython/jit/backend/x86/test/test_stm_integration.py
@@ -1,5 +1,6 @@
import py
-from rpython.rtyper.lltypesystem import lltype, llmemory, rffi, rstr, rclass
+from rpython.rtyper.lltypesystem import lltype, llmemory, rffi, rstr
+from rpython.rtyper import rclass
from rpython.jit.metainterp.history import ResOperation, TargetToken,\
JitCellToken
from rpython.jit.metainterp.history import (BoxInt, BoxPtr, ConstInt,
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