[pypy-commit] pypy stmgc-c7: Missing transactionsafe. Add a no_collect at a place where it used
arigo
noreply at buildbot.pypy.org
Tue Mar 25 11:46:44 CET 2014
Author: Armin Rigo <arigo at tunes.org>
Branch: stmgc-c7
Changeset: r70275:b832e861aef4
Date: 2014-03-25 11:45 +0100
http://bitbucket.org/pypy/pypy/changeset/b832e861aef4/
Log: Missing transactionsafe. Add a no_collect at a place where it used
to collect (because of stm_become_inevitable()).
diff --git a/rpython/jit/backend/llsupport/jitframe.py b/rpython/jit/backend/llsupport/jitframe.py
--- a/rpython/jit/backend/llsupport/jitframe.py
+++ b/rpython/jit/backend/llsupport/jitframe.py
@@ -3,7 +3,7 @@
from rpython.rlib.objectmodel import specialize
from rpython.rlib.debug import ll_assert
from rpython.rlib.objectmodel import enforceargs
-from rpython.rlib.rgc import stm_is_enabled
+from rpython.rlib import rgc
SIZEOFSIGNED = rffi.sizeof(lltype.Signed)
IS_32BIT = (SIZEOFSIGNED == 4)
@@ -15,10 +15,11 @@
GCMAP = lltype.Array(lltype.Unsigned)
NULLGCMAP = lltype.nullptr(GCMAP)
+ at rgc.no_collect
@enforceargs(None, int, int)
def jitframeinfo_update_depth(jfi, base_ofs, new_depth):
#
- if stm_is_enabled():
+ if rgc.stm_is_enabled():
from rpython.rlib.atomic_ops import bool_cas
# careful here, 'jfi' has 'stm_dont_track_raw_accesses'
while True:
diff --git a/rpython/rlib/atomic_ops.py b/rpython/rlib/atomic_ops.py
--- a/rpython/rlib/atomic_ops.py
+++ b/rpython/rlib/atomic_ops.py
@@ -16,8 +16,10 @@
bool_cas = rffi.llexternal('pypy_bool_cas', [llmemory.Address]*3, lltype.Bool,
- compilation_info=eci, macro=True, _nowrapper=True)
+ compilation_info=eci, macro=True, _nowrapper=True,
+ transactionsafe=True)
fetch_and_add = rffi.llexternal('pypy_fetch_and_add', [llmemory.Address,
lltype.Signed],
lltype.Signed, compilation_info=eci,
- macro=True, _nowrapper=True)
+ macro=True, _nowrapper=True,
+ transactionsafe=True)
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