[pypy-commit] pypy stmgc-c7: fixes

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: stmgc-c7
Changeset: r70171:03eba8c7dd62
Date: 2014-03-22 18:43 +0100
http://bitbucket.org/pypy/pypy/changeset/03eba8c7dd62/

Log:	fixes

diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1476,33 +1476,36 @@
     # ----------
 
     def load_from_mem(self, resloc, source_addr, size_loc, sign_loc, op):
-        assert isinstance(resloc, RegLoc)
         size = size_loc.value
         sign = sign_loc.value
         self.mc.SEGC7_if_gc(op)
+        self.generate_one_mov_with_extension(resloc, source_addr, size, sign)
+
+    def generate_one_mov_with_extension(self, resloc, srcloc, size, sign):
+        assert isinstance(resloc, RegLoc)
         if resloc.is_xmm:
-            self.mc.MOVSD(resloc, source_addr)
+            self.mc.MOVSD(resloc, srcloc)
         elif size == WORD:
-            self.mc.MOV(resloc, source_addr)
+            self.mc.MOV(resloc, srcloc)
         elif size == 1:
             if sign:
-                self.mc.MOVSX8(resloc, source_addr)
+                self.mc.MOVSX8(resloc, srcloc)
             else:
-                self.mc.MOVZX8(resloc, source_addr)
+                self.mc.MOVZX8(resloc, srcloc)
         elif size == 2:
             if sign:
-                self.mc.MOVSX16(resloc, source_addr)
+                self.mc.MOVSX16(resloc, srcloc)
             else:
-                self.mc.MOVZX16(resloc, source_addr)
+                self.mc.MOVZX16(resloc, srcloc)
         elif IS_X86_64 and size == 4:
             if sign:
-                self.mc.MOVSX32(resloc, source_addr)
+                self.mc.MOVSX32(resloc, srcloc)
             else:
-                self.mc.MOV32(resloc, source_addr)    # zero-extending
+                self.mc.MOV32(resloc, srcloc)    # zero-extending
         else:
             not_implemented("load_from_mem size = %d" % size)
 
-    def save_into_mem(self, dest_addr, value_loc, size_loc):
+    def save_into_mem(self, dest_addr, value_loc, size_loc, op):
         size = size_loc.value
         self.mc.SEGC7_if_gc(op)
         if isinstance(value_loc, RegLoc) and value_loc.is_xmm:
@@ -2156,15 +2159,6 @@
 
     def _call_assembler_check_descr(self, value, tmploc):
         ofs = self.cpu.get_ofs_of_frame_field('jf_descr')
-
-        if self.cpu.gc_ll_descr.stm:
-            # value is non-moving, but jf_descr may have a changed
-            # descr -> different copy
-            self._stm_ptr_eq_fastpath(self.mc, [mem(eax, ofs), imm(value)],
-                                      tmploc)
-            self.mc.J_il8(rx86.Conditions['NZ'], 0)
-            return self.mc.get_relative_pos()
-        
         self.mc.CMP(mem(eax, ofs), imm(value))
         # patched later
         self.mc.J_il8(rx86.Conditions['E'], 0) # goto B if we get 'done_with_this_frame'
@@ -2602,14 +2596,15 @@
         self._emit_guard_not_forced(guard_token)
 
     def genop_discard_stm_read(self, op, arglocs):
-        assert IS_X86_64, "needed for X86_64_SCRATCH_REG"
+        if not IS_X86_64:
+            todo()   # "needed for X86_64_SCRATCH_REG"
         mc = self.mc
         rmreg = X86_64_SCRATCH_REG.value
         mc.SEGC7()
         mc.MOVZX8_rj(rmreg, rstm.adr_transaction_read_version)
         #
         loc_src, loc_tmp = arglocs
-        if tmp_loc is None:
+        if loc_tmp is None:
             assert isinstance(loc_src, ImmedLoc)
             assert loc_src.value > 0
             mem = loc_src.value >> 4
diff --git a/rpython/jit/backend/x86/callbuilder.py b/rpython/jit/backend/x86/callbuilder.py
--- a/rpython/jit/backend/x86/callbuilder.py
+++ b/rpython/jit/backend/x86/callbuilder.py
@@ -68,7 +68,7 @@
         """Overridden in CallBuilder32 and CallBuilder64"""
         if self.ressize == 0:
             return      # void result
-        # use the code in load_from_mem to do the zero- or sign-extension
+        # use the code in self.asm to do the zero- or sign-extension
         srcloc = self.tmpresloc
         if srcloc is None:
             if self.restype == FLOAT:
@@ -79,8 +79,8 @@
             return      # no need for any MOV
         if self.ressize == 1 and isinstance(srcloc, RegLoc):
             srcloc = srcloc.lowest8bits()
-        self.asm.load_from_mem(self.resloc, srcloc,
-                               imm(self.ressize), imm(self.ressign))
+        self.asm.generate_one_mov_with_extension(self.resloc, srcloc,
+                                                 self.ressize, self.ressign)
 
     def push_gcmap(self):
         # we push *now* the gcmap, describing the status of GC registers