[pypy-commit] pypy stmgc-c4: add new llops to funcgen and change code generation in assembler

Raemi noreply at buildbot.pypy.org
Sun Jan 12 14:11:19 CET 2014


Author: Remi Meier <remi.meier at gmail.com>
Branch: stmgc-c4
Changeset: r68607:1b0169359e7d
Date: 2014-01-12 14:10 +0100
http://bitbucket.org/pypy/pypy/changeset/1b0169359e7d/

Log:	add new llops to funcgen and change code generation in assembler

diff --git a/pypy/interpreter/pyopcode.py b/pypy/interpreter/pyopcode.py
--- a/pypy/interpreter/pyopcode.py
+++ b/pypy/interpreter/pyopcode.py
@@ -67,7 +67,7 @@
                         self=self, co_code=co_code,
                         next_instr=next_instr, ec=ec)
                     # nothing inbetween!
-                    if rstm.jit_should_break_transaction(False):
+                    if rstm.jit_stm_should_break_transaction(False):
                         rstm.jit_stm_transaction_break_point()
                     self = self._hints_for_stm()
                 next_instr = self.handle_bytecode(co_code, next_instr, ec)
diff --git a/pypy/module/pypyjit/interp_jit.py b/pypy/module/pypyjit/interp_jit.py
--- a/pypy/module/pypyjit/interp_jit.py
+++ b/pypy/module/pypyjit/interp_jit.py
@@ -70,7 +70,7 @@
                     frame=self, next_instr=next_instr, pycode=pycode,
                     is_being_profiled=is_being_profiled)
                 # nothing inbetween!
-                if rstm.jit_should_break_transaction(False):
+                if rstm.jit_stm_should_break_transaction(False):
                     rstm.jit_stm_transaction_break_point()
                 co_code = pycode.co_code
                 self.valuestackdepth = hint(self.valuestackdepth, promote=True)
@@ -97,7 +97,7 @@
             self.last_instr = intmask(jumpto)
             ec.bytecode_trace(self, decr_by)
             jumpto = r_uint(self.last_instr)
-            if rstm.jit_should_break_transaction(True):
+            if rstm.jit_stm_should_break_transaction(True):
                 rstm.jit_stm_transaction_break_point()
         #
         pypyjitdriver.can_enter_jit(frame=self, ec=ec, next_instr=jumpto,
diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -3160,52 +3160,18 @@
             return     # tests only
 
         mc = self.mc
-        # if stm_should_break_transaction()
-        fn = stmtlocal.stm_should_break_transaction_fn
-        mc.CALL(imm(self.cpu.cast_ptr_to_int(fn)))
-        mc.TEST8(eax.lowest8bits(), eax.lowest8bits())
-        mc.J_il(rx86.Conditions['Z'], 0xfffff)    # patched later
-        jz_location2 = mc.get_relative_pos()
         #
         # call stm_transaction_break() with the address of the
         # STM_RESUME_BUF and the custom longjmp function
         self.push_gcmap(mc, gcmap, mov=True)
         #
-        # save all registers
-        base_ofs = self.cpu.get_baseofs_of_frame_field()
-        for gpr in self._regalloc.rm.reg_bindings.values():
-            v = gpr_reg_mgr_cls.all_reg_indexes[gpr.value]
-            mc.MOV_br(v * WORD + base_ofs, gpr.value)
-        if IS_X86_64:
-            coeff = 1
-        else:
-            coeff = 2
-        ofs = len(gpr_reg_mgr_cls.all_regs)
-        for xr in self._regalloc.xrm.reg_bindings.values():
-            mc.MOVSD_bx((ofs + xr.value * coeff) * WORD + base_ofs, xr.value)
-        #
         # CALL break function
         fn = self.stm_transaction_break_path
         mc.CALL(imm(fn))
         # ** HERE ** is the place an aborted transaction retries
         # ebp/frame reloaded by longjmp callback
         #
-        # restore regs
-        base_ofs = self.cpu.get_baseofs_of_frame_field()
-        for gpr in self._regalloc.rm.reg_bindings.values():
-            v = gpr_reg_mgr_cls.all_reg_indexes[gpr.value]
-            mc.MOV_rb(gpr.value, v * WORD + base_ofs)
-        if IS_X86_64:
-            coeff = 1
-        else:
-            coeff = 2
-        ofs = len(gpr_reg_mgr_cls.all_regs)
-        for xr in self._regalloc.xrm.reg_bindings.values():
-            mc.MOVSD_xb(xr.value, (ofs + xr.value * coeff) * WORD + base_ofs)
-        #
-        # patch the JZ above
-        offset = mc.get_relative_pos() - jz_location2
-        mc.overwrite32(jz_location2-4, offset)
+
 
 
 
diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -1278,8 +1278,8 @@
     def consider_stm_transaction_break(self, op):
         #
         # only save regs for the should_break_transaction call
-        self.xrm.before_call()
-        self.rm.before_call()
+        self.xrm.before_call(save_all_regs=1)
+        self.rm.before_call(save_all_regs=1)
         gcmap = self.get_gcmap() # allocate the gcmap *before*
         #
         self.assembler.stm_transaction_break(gcmap)
diff --git a/rpython/jit/tl/tlc.py b/rpython/jit/tl/tlc.py
--- a/rpython/jit/tl/tlc.py
+++ b/rpython/jit/tl/tlc.py
@@ -250,7 +250,7 @@
                 myjitdriver.jit_merge_point(frame=frame,
                                             code=code, pc=pc, pool=pool)
                 # nothing inbetween!
-                if rstm.jit_should_break_transaction(False):
+                if rstm.jit_stm_should_break_transaction(False):
                     rstm.jit_stm_transaction_break_point()
             opcode = ord(code[pc])
             pc += 1
@@ -352,7 +352,7 @@
                 pc += char2int(code[pc])
                 pc += 1
                 if jitted and old_pc > pc:
-                    if rstm.jit_should_break_transaction(True):
+                    if rstm.jit_stm_should_break_transaction(True):
                         rstm.jit_stm_transaction_break_point()
                     myjitdriver.can_enter_jit(code=code, pc=pc, frame=frame,
                                               pool=pool)
@@ -363,7 +363,7 @@
                     old_pc = pc
                     pc += char2int(code[pc]) + 1
                     if jitted and old_pc > pc:
-                        if rstm.jit_should_break_transaction(True):
+                        if rstm.jit_stm_should_break_transaction(True):
                             rstm.jit_stm_transaction_break_point()
                         myjitdriver.can_enter_jit(code=code, pc=pc, frame=frame,
                                                   pool=pool)
@@ -376,7 +376,7 @@
                     old_pc = pc
                     pc += offset
                     if jitted and old_pc > pc:
-                        if rstm.jit_should_break_transaction(True):
+                        if rstm.jit_stm_should_break_transaction(True):
                             rstm.jit_stm_transaction_break_point()
                         myjitdriver.can_enter_jit(code=code, pc=pc, frame=frame,
                                                   pool=pool)
diff --git a/rpython/translator/c/funcgen.py b/rpython/translator/c/funcgen.py
--- a/rpython/translator/c/funcgen.py
+++ b/rpython/translator/c/funcgen.py
@@ -623,6 +623,7 @@
     OP_STM_CLEAR_EXCEPTION_DATA_ON_ABORT= _OP_STM
     OP_STM_ALLOCATE_NONMOVABLE_INT_ADR  = _OP_STM
     OP_JIT_STM_TRANSACTION_BREAK_POINT  = _OP_STM
+    OP_JIT_STM_SHOULD_BREAK_TRANSACTION = _OP_STM
 
     def OP_STM_IGNORED_START(self, op):
         return '/* stm_ignored_start */'
diff --git a/rpython/translator/stm/funcgen.py b/rpython/translator/stm/funcgen.py
--- a/rpython/translator/stm/funcgen.py
+++ b/rpython/translator/stm/funcgen.py
@@ -50,6 +50,10 @@
 
 def jit_stm_transaction_break_point(funcgen, op):
     return '/* jit_stm_transaction_break_point */'
+
+def jit_stm_should_break_transaction(funcgen, op):
+    result = funcgen.expr(op.result)
+    return '%s = 0; /* jit_stm_should_break_transaction */' % (result, )
     
 def stm_finalize(funcgen, op):
     return 'stm_finalize();'


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