[pypy-commit] pypy jitframe-on-heap: try to kill some mess of violently reusing registers. we can no longer do this due to reusing of frame values
fijal
noreply at buildbot.pypy.org
Mon Jan 21 20:07:34 CET 2013
Author: Maciej Fijalkowski <fijall at gmail.com>
Branch: jitframe-on-heap
Changeset: r60308:0b5a92341348
Date: 2013-01-21 21:07 +0200
http://bitbucket.org/pypy/pypy/changeset/0b5a92341348/
Log: try to kill some mess of violently reusing registers. we can no
longer do this due to reusing of frame values
diff --git a/rpython/jit/backend/llsupport/regalloc.py b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -169,6 +169,8 @@
#
self.bindings[box] = newloc
+ if not we_are_translated():
+ self._check_invariants()
return newloc
def bind(self, box, loc):
@@ -188,6 +190,8 @@
for elem in range(len(all)):
if not all[elem]:
self.freelist._append(elem)
+ if not we_are_translated():
+ self._check_invariants()
def mark_as_free(self, box):
try:
@@ -197,6 +201,23 @@
del self.bindings[box]
size = self.frame_size(box.type)
self.freelist.append(size, loc)
+ if not we_are_translated():
+ self._check_invariants()
+
+ def _check_invariants(self):
+ all = [0] * self.get_frame_depth()
+ for b, loc in self.bindings.iteritems():
+ size = self.frame_size(b)
+ pos = self.get_loc_index(loc)
+ for i in range(pos, pos + size):
+ assert not all[i]
+ all[i] = 1
+ node = self.freelist.master_node
+ while node is not None:
+ assert not all[node.val]
+ all[node.val] = 1
+ node = node.next
+ assert all == [1] * self.get_frame_depth()
def try_to_reuse_location(self, box, loc):
xxx
diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1865,6 +1865,7 @@
v = gpr_reg_mgr_cls.all_reg_indexes[loc.value]
positions[i] = v * WORD
# write down the positions of locs
+ print guardtok.fail_locs
guardtok.faildescr.rd_locs = positions
#if WORD == 4:
# mc.PUSH(imm(fail_descr))
diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -160,6 +160,9 @@
for _i, _reg in enumerate(gpr_reg_mgr_cls.all_regs):
gpr_reg_mgr_cls.all_reg_indexes[_reg.value] = _i
+if __name__ == '__main__':
+ print gpr_reg_mgr_cls.all_reg_indexes
+
class RegAlloc(object):
def __init__(self, assembler, translate_support_code=False):
@@ -483,7 +486,6 @@
else:
resloc = None
self.perform_guard(op, [loc, loc1], resloc)
- self.rm.possibly_free_var(box)
consider_guard_no_overflow = consider_guard_no_exception
consider_guard_overflow = consider_guard_no_exception
@@ -506,7 +508,6 @@
argloc = self.loc(op.getarg(1))
args = op.getarglist()
loc = self.rm.force_result_in_reg(op.result, x, args)
- self.rm.possibly_free_var(op.getarg(1))
return loc, argloc
def _consider_binop(self, op):
@@ -515,7 +516,6 @@
def _consider_lea(self, op, loc):
argloc = self.loc(op.getarg(1))
- self.rm.possibly_free_var(op.getarg(0))
resloc = self.force_allocate_reg(op.result)
self.Perform(op, [loc, argloc], resloc)
@@ -595,13 +595,12 @@
vx = op.getarg(0)
vy = op.getarg(1)
arglocs = [self.loc(vx), self.loc(vy)]
+ args = op.getarglist()
if (vx in self.rm.reg_bindings or vy in self.rm.reg_bindings or
isinstance(vx, Const) or isinstance(vy, Const)):
pass
else:
arglocs[0] = self.rm.make_sure_var_in_reg(vx)
- args = op.getarglist()
- self.rm.possibly_free_vars(args)
if guard_op is None:
loc = self.rm.force_allocate_reg(op.result, args,
need_lower_byte=True)
@@ -643,7 +642,6 @@
arglocs[1] = self.xrm.make_sure_var_in_reg(vy)
else:
arglocs[0] = self.xrm.make_sure_var_in_reg(vx)
- self.xrm.possibly_free_vars_for_op(op)
if guard_op is None:
res = self.rm.force_allocate_reg(op.result, need_lower_byte=True)
self.Perform(op, arglocs, res)
@@ -677,7 +675,6 @@
def consider_cast_float_to_singlefloat(self, op):
loc0 = self.xrm.make_sure_var_in_reg(op.getarg(0))
loc1 = self.rm.force_allocate_reg(op.result)
- self.xrm.possibly_free_var(op.getarg(0))
tmpxvar = TempBox()
loctmp = self.xrm.force_allocate_reg(tmpxvar) # may be equal to loc0
self.xrm.possibly_free_var(tmpxvar)
@@ -742,7 +739,6 @@
loc1 = self.xrm.make_sure_var_in_reg(box)
loc0 = self.rm.force_allocate_reg(op.result)
self.PerformLLong(op, [loc1], loc0)
- self.xrm.possibly_free_var(box)
return True
def _consider_llong_to_int(self, op):
@@ -958,8 +954,6 @@
if not isinstance(index_loc, ImmedLoc):
# ...that is, except in a corner case where 'index_loc' would be
# in the same register as 'value_loc'...
- if index_loc is not value_loc:
- self.rm.possibly_free_var(box_index)
tempvar = TempBox()
temp_loc = self.rm.force_allocate_reg(tempvar, [box_base,
box_value])
@@ -1007,7 +1001,6 @@
size_loc = imm(size)
args = op.getarglist()
base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
- self.rm.possibly_free_vars(args)
result_loc = self.force_allocate_reg(op.result)
if sign:
sign_loc = imm1
@@ -1024,7 +1017,6 @@
args = op.getarglist()
base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
ofs_loc = self.rm.make_sure_var_in_reg(op.getarg(1), args)
- self.rm.possibly_free_vars_for_op(op)
result_loc = self.force_allocate_reg(op.result)
if sign:
sign_loc = imm1
@@ -1051,7 +1043,6 @@
# 'base' and 'index' are put in two registers (or one if 'index'
# is an immediate). 'result' can be in the same register as
# 'index' but must be in a different register than 'base'.
- self.rm.possibly_free_var(op.getarg(1))
result_loc = self.force_allocate_reg(op.result, [op.getarg(0)])
assert isinstance(result_loc, RegLoc)
# two cases: 1) if result_loc is a normal register, use it as temp_loc
@@ -1064,14 +1055,12 @@
tempvar = TempBox()
temp_loc = self.rm.force_allocate_reg(tempvar, [op.getarg(0)])
self.rm.possibly_free_var(tempvar)
- self.rm.possibly_free_var(op.getarg(0))
self.Perform(op, [base_loc, ofs, itemsize, fieldsize,
index_loc, temp_loc, sign_loc], result_loc)
def consider_int_is_true(self, op, guard_op):
# doesn't need arg to be in a register
argloc = self.loc(op.getarg(0))
- self.rm.possibly_free_var(op.getarg(0))
if guard_op is not None:
self.perform_with_guard(op, guard_op, [argloc], None)
else:
@@ -1082,7 +1071,6 @@
def consider_same_as(self, op):
argloc = self.loc(op.getarg(0))
- self.possibly_free_var(op.getarg(0))
resloc = self.force_allocate_reg(op.result)
self.Perform(op, [argloc], resloc)
consider_cast_ptr_to_int = consider_same_as
@@ -1091,13 +1079,11 @@
def consider_int_force_ge_zero(self, op):
argloc = self.make_sure_var_in_reg(op.getarg(0))
resloc = self.force_allocate_reg(op.result, [op.getarg(0)])
- self.possibly_free_var(op.getarg(0))
self.Perform(op, [argloc], resloc)
def consider_strlen(self, op):
args = op.getarglist()
base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
- self.rm.possibly_free_vars_for_op(op)
result_loc = self.rm.force_allocate_reg(op.result)
self.Perform(op, [base_loc], result_loc)
@@ -1109,7 +1095,6 @@
ofs = arraydescr.lendescr.offset
args = op.getarglist()
base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
- self.rm.possibly_free_vars_for_op(op)
result_loc = self.rm.force_allocate_reg(op.result)
self.Perform(op, [base_loc, imm(ofs)], result_loc)
@@ -1117,7 +1102,6 @@
args = op.getarglist()
base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
ofs_loc = self.rm.make_sure_var_in_reg(op.getarg(1), args)
- self.rm.possibly_free_vars_for_op(op)
result_loc = self.rm.force_allocate_reg(op.result)
self.Perform(op, [base_loc, ofs_loc], result_loc)
@@ -1135,9 +1119,6 @@
base_loc = self.rm.make_sure_var_in_reg(args[0], args)
ofs_loc = self.rm.make_sure_var_in_reg(args[2], args)
assert args[0] is not args[1] # forbidden case of aliasing
- self.rm.possibly_free_var(args[0])
- if args[3] is not args[2] is not args[4]: # MESS MESS MESS: don't free
- self.rm.possibly_free_var(args[2]) # it if ==args[3] or args[4]
srcaddr_box = TempBox()
forbidden_vars = [args[1], args[3], args[4], srcaddr_box]
srcaddr_loc = self.rm.force_allocate_reg(srcaddr_box, forbidden_vars)
@@ -1146,9 +1127,6 @@
# compute the destination address
base_loc = self.rm.make_sure_var_in_reg(args[1], forbidden_vars)
ofs_loc = self.rm.make_sure_var_in_reg(args[3], forbidden_vars)
- self.rm.possibly_free_var(args[1])
- if args[3] is not args[4]: # more of the MESS described above
- self.rm.possibly_free_var(args[3])
forbidden_vars = [args[4], srcaddr_box]
dstaddr_box = TempBox()
dstaddr_loc = self.rm.force_allocate_reg(dstaddr_box, forbidden_vars)
@@ -1158,7 +1136,6 @@
length_box = args[4]
length_loc = self.loc(length_box)
if is_unicode:
- self.rm.possibly_free_var(length_box)
forbidden_vars = [srcaddr_box, dstaddr_box]
bytes_box = TempBox()
bytes_loc = self.rm.force_allocate_reg(bytes_box, forbidden_vars)
diff --git a/rpython/jit/backend/x86/test/test_gc_integration.py b/rpython/jit/backend/x86/test/test_gc_integration.py
--- a/rpython/jit/backend/x86/test/test_gc_integration.py
+++ b/rpython/jit/backend/x86/test/test_gc_integration.py
@@ -344,9 +344,9 @@
frames = []
def check(i):
+ import pdb
+ pdb.set_trace()
assert self.cpu.gc_ll_descr.gcrootmap.stack[0] == i - ofs
- frame = rffi.cast(jitframe.JITFRAMEPTR, i - ofs)
- frames.append(frame)
assert len(frame.jf_frame) == JITFRAME_FIXED_SIZE
# we "collect"
new_frame = frame.copy()
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