[pypy-commit] pypy jitframe-on-heap: a historical commit - start sharing code between arm and x86

[fijal]

Author: Maciej Fijalkowski <fijall at gmail.com>
Branch: jitframe-on-heap
Changeset: r61143:3c7de3e490d1
Date: 2013-02-12 18:30 +0200
http://bitbucket.org/pypy/pypy/changeset/3c7de3e490d1/

Log:	a historical commit - start sharing code between arm and x86

diff --git a/rpython/jit/backend/arm/regalloc.py b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -1,8 +1,8 @@
-from rpython.rtyper.annlowlevel import llhelper, cast_instance_to_gcref
+from rpython.rtyper.annlowlevel import cast_instance_to_gcref
 from rpython.rlib import rgc
 from rpython.rlib.debug import debug_print, debug_start, debug_stop
 from rpython.jit.backend.llsupport.regalloc import FrameManager, \
-        RegisterManager, TempBox, compute_vars_longevity
+        RegisterManager, TempBox, compute_vars_longevity, BaseRegalloc
 from rpython.jit.backend.arm import registers as r
 from rpython.jit.backend.arm import locations
 from rpython.jit.backend.arm.locations import imm, get_fp_offset
@@ -16,7 +16,7 @@
                                                     )
 from rpython.jit.backend.arm.jump import remap_frame_layout_mixed
 from rpython.jit.backend.arm.arch import MY_COPY_OF_REGS
-from rpython.jit.backend.arm.arch import WORD, DOUBLE_WORD, JITFRAME_FIXED_SIZE
+from rpython.jit.backend.arm.arch import WORD, JITFRAME_FIXED_SIZE
 from rpython.jit.codewriter import longlong
 from rpython.jit.metainterp.history import (Const, ConstInt, ConstFloat, ConstPtr,
                                         Box, BoxPtr,
@@ -32,7 +32,6 @@
 from rpython.jit.backend.llsupport.descr import unpack_arraydescr
 from rpython.jit.backend.llsupport.descr import unpack_fielddescr
 from rpython.jit.backend.llsupport.descr import unpack_interiorfielddescr
-from rpython.rlib.objectmodel import we_are_translated
 
 
 # xxx hack: set a default value for TargetToken._arm_loop_code.  If 0, we know
@@ -179,7 +178,7 @@
         return reg
 
 
-class Regalloc(object):
+class Regalloc(BaseRegalloc):
 
     def __init__(self, assembler=None):
         self.cpu = assembler.cpu
@@ -316,12 +315,6 @@
     def get_final_frame_depth(self):
         return self.frame_manager.get_frame_depth()
 
-    def _set_initial_bindings(self, inputargs):
-        # the input args are passed in the jitframe
-        for box in inputargs:
-            assert isinstance(box, Box)
-            self.fm.get_new_loc(box)
-
     def _update_bindings(self, locs, inputargs):
         used = {}
         i = 0
diff --git a/rpython/jit/backend/llsupport/regalloc.py b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -627,6 +627,22 @@
         """ Platform specific - Allocates a temporary register """
         raise NotImplementedError("Abstract")
 
+class BaseRegalloc(object):
+    """ Base class on which all the backend regallocs should be based
+    """
+    def _set_initial_bindings(self, inputargs, looptoken):
+        """ Set the bindings at the start of the loop
+        """
+        locs = []
+        base_ofs = self.assembler.cpu.get_baseofs_of_frame_field()
+        for box in inputargs:
+            assert isinstance(box, Box)
+            loc = self.fm.get_new_loc(box)
+            locs.append(loc.value - base_ofs)
+        if looptoken.compiled_loop_token is not None:
+            # for tests
+            looptoken.compiled_loop_token._ll_initial_locs = locs
+
 
 def compute_vars_longevity(inputargs, operations):
     # compute a dictionary that maps variables to index in
diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -23,7 +23,7 @@
 from rpython.jit.backend.llsupport.descr import unpack_fielddescr
 from rpython.jit.backend.llsupport.descr import unpack_interiorfielddescr
 from rpython.jit.backend.llsupport.gcmap import allocate_gcmap
-from rpython.jit.backend.llsupport.regalloc import FrameManager,\
+from rpython.jit.backend.llsupport.regalloc import FrameManager, BaseRegalloc,\
      RegisterManager, TempBox, compute_vars_longevity, is_comparison_or_ovf_op
 from rpython.jit.backend.x86.arch import WORD, JITFRAME_FIXED_SIZE
 from rpython.jit.backend.x86.arch import IS_X86_32, IS_X86_64
@@ -133,7 +133,7 @@
 for _i, _reg in enumerate(gpr_reg_mgr_cls.all_regs):
     gpr_reg_mgr_cls.all_reg_indexes[_reg.value] = _i
 
-class RegAlloc(object):
+class RegAlloc(BaseRegalloc):
 
     def __init__(self, assembler, translate_support_code=False):
         assert isinstance(translate_support_code, bool)
@@ -188,17 +188,6 @@
     def get_final_frame_depth(self):
         return self.fm.get_frame_depth()
 
-    def _set_initial_bindings(self, inputargs, looptoken):
-        locs = []
-        base_ofs = self.assembler.cpu.get_baseofs_of_frame_field()
-        for box in inputargs:
-            assert isinstance(box, Box)
-            loc = self.fm.get_new_loc(box)
-            locs.append(loc.value - base_ofs)
-        if looptoken.compiled_loop_token is not None:
-            # for tests
-            looptoken.compiled_loop_token._ll_initial_locs = locs
-
     def possibly_free_var(self, var):
         if var.type == FLOAT:
             self.xrm.possibly_free_var(var)