[pypy-commit] pypy arm-backend-2: try to make sure the stack stays aligned when using saved_registers

[bivab]

Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r45525:c959cad72952
Date: 2011-07-12 13:41 +0200
http://bitbucket.org/pypy/pypy/changeset/c959cad72952/

Log:	try to make sure the stack stays aligned when using saved_registers

diff --git a/pypy/jit/backend/arm/assembler.py b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -344,6 +344,7 @@
                     encode32(mem, j+1, loc.getint())
                     j += 5
                 else:
+                    assert loc.is_stack()
                     mem[j] = self.STACK_LOC
                     encode32(mem, j+1, loc.position)
                     j += 5
@@ -364,13 +365,14 @@
         return memaddr
 
     def gen_exit_code(self, mc, memaddr, fcond=c.AL, save_exc=False):
-        mc.LDR_ri(r.ip.value, r.pc.value, imm=WORD)
+        self.mc.gen_load_int(r.ip.value, memaddr)
+        #mc.LDR_ri(r.ip.value, r.pc.value, imm=WORD)
         if save_exc:
             path = self._leave_jitted_hook_save_exc
         else:
             path = self._leave_jitted_hook
         mc.B(path)
-        mc.write32(memaddr)
+        #mc.write32(memaddr)
 
     def align(self):
         while(self.mc.currpos() % FUNC_ALIGN != 0):
@@ -680,7 +682,7 @@
         size = (self.mc.size_of_gen_load_int+WORD)
         l = self.mc.currpos()
         for _ in range(size//WORD):
-            self.mc.MOV_rr(r.r0.value, r.r0.value)
+            self.mc.NOP()
         return l
 
     def _patch_sp_offset(self, pos, frame_depth):
@@ -981,13 +983,12 @@
         # convention of slowpath_addr{1,2} are tweaked a lot to allow
         # the code here to be just two CALLs: slowpath_addr1 gets the
         # size of the object to allocate from (EDX-EAX) and returns the
-        # result in EAX; slowpath_addr2 additionally returns in EDX a
+        # result in EAX; self.malloc_slowpath additionally returns in EDX a
         # copy of heap(nursery_free_adr), so that the final MOV below is
         # a no-op.
         self.mark_gc_roots(self.write_new_force_index(),
                            use_copy_area=True)
-        slowpath_addr2 = self.malloc_slowpath
-        self.mc.BL(slowpath_addr2)
+        self.mc.BL(self.malloc_slowpath)
 
         offset = self.mc.currpos() - fast_jmp_pos
         pmc = OverwritingBuilder(self.mc, fast_jmp_pos, WORD)
diff --git a/pypy/jit/backend/arm/helper/assembler.py b/pypy/jit/backend/arm/helper/assembler.py
--- a/pypy/jit/backend/arm/helper/assembler.py
+++ b/pypy/jit/backend/arm/helper/assembler.py
@@ -33,10 +33,10 @@
     def f(self, op, arglocs, regalloc, fcond):
         assert fcond is not None
         if op.result:
-            regs = r.caller_resp[1:]
+            regs = r.caller_resp[1:] + [r.ip]
         else:
             regs = r.caller_resp
-        with saved_registers(self.mc, regs, r.caller_vfp_resp, regalloc=regalloc):
+        with saved_registers(self.mc, regs, r.caller_vfp_resp):
             helper(self.mc, fcond)
         return fcond
     return f
@@ -83,8 +83,9 @@
 
 class saved_registers(object):
     def __init__(self, assembler, regs_to_save, vfp_regs_to_save=None, regalloc=None):
+        assert regalloc is None
         self.assembler = assembler
-        self.regalloc = regalloc
+        self.regalloc = None
         if vfp_regs_to_save is None:
             vfp_regs_to_save = []
         if self.regalloc:
diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -463,7 +463,7 @@
 
         # the following is supposed to be the slow path, so whenever possible
         # we choose the most compact encoding over the most efficient one.
-        with saved_registers(self.mc, r.caller_resp, regalloc=regalloc):
+        with saved_registers(self.mc, r.caller_resp):
             remap_frame_layout(self, arglocs, [r.r0, r.r1], r.ip)
             self.mc.BL(descr.get_write_barrier_fn(self.cpu))
 
@@ -845,7 +845,8 @@
         jd = descr.outermost_jitdriver_sd
         assert jd is not None
         asm_helper_adr = self.cpu.cast_adr_to_int(jd.assembler_helper_adr)
-        with saved_registers(self.mc, r.caller_resp[1:], r.caller_vfp_resp, regalloc=regalloc):
+        with saved_registers(self.mc, r.caller_resp[1:]+[r.ip], 
+                                    r.caller_vfp_resp):
             # resbox is allready in r0
             self.mov_loc_loc(arglocs[1], r.r1)
             self.mc.BL(asm_helper_adr)