[pypy-svn] r79145 - in pypy/branch/arm-backend/pypy/jit/backend/arm: . helper

[david at codespeak.net]

Author: david
Date: Tue Nov 16 14:14:17 2010
New Revision: 79145

Modified:
   pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py
Log:
Implement same_as operation

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py	Tue Nov 16 14:14:17 2010
@@ -199,13 +199,12 @@
     epilog_size = 3*WORD
     def gen_func_epilog(self,cond=c.AL):
         self.mc.MOV_rr(r.sp.value, r.fp.value)
-        self.mc.POP([r.r4.value], cond=cond) # Pop value used as forcething
+        self.mc.ADD_ri(r.sp.value, r.sp.value, WORD)
         self.mc.POP([reg.value for reg in r.callee_restored_registers], cond=cond)
 
     def gen_func_prolog(self):
         self.mc.PUSH([reg.value for reg in r.callee_saved_registers])
-        self.mc.MOV_ri(r.r4.value, 0xCC)
-        self.mc.PUSH([r.r4.value]) # Push some reg to use as force thing which is restored when popping from stack
+        self.mc.SUB_ri(r.sp.value, r.sp.value,  WORD)
         self.mc.MOV_rr(r.fp.value, r.sp.value)
 
     def gen_bootstrap_code(self, inputargs, regalloc, looptoken):

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py	Tue Nov 16 14:14:17 2010
@@ -50,10 +50,8 @@
         arg2 = regalloc.make_sure_var_in_reg(a1, [a0], selected_reg=r.r1, imm_fine=False)
         assert arg1 == r.r0
         assert arg2 == r.r1
-        regalloc.before_call()
         res = regalloc.force_allocate_reg(op.result, selected_reg=r.r0)
         getattr(self.mc, opname)(fcond)
-        regalloc.after_call(op.result)
         regalloc.possibly_free_vars_for_op(op)
         return fcond
     return f

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py	Tue Nov 16 14:14:17 2010
@@ -13,7 +13,7 @@
 from pypy.jit.backend.llsupport import symbolic
 from pypy.jit.backend.llsupport.descr import BaseFieldDescr, BaseArrayDescr
 from pypy.jit.backend.llsupport.regalloc import compute_vars_longevity, TempBox
-from pypy.jit.metainterp.history import ConstInt, BoxInt, BasicFailDescr
+from pypy.jit.metainterp.history import Const, ConstInt, BoxInt, BasicFailDescr
 from pypy.jit.metainterp.resoperation import rop
 from pypy.rlib import rgc
 from pypy.rlib.objectmodel import we_are_translated
@@ -275,6 +275,17 @@
             self._adjust_sp(-n, regalloc, fcond=fcond)
         regalloc.possibly_free_vars(locs)
 
+    def emit_op_same_as(self, op, regalloc, fcond):
+        resloc = regalloc.force_allocate_reg(op.result)
+        arg = op.getarg(0)
+        imm_arg = isinstance(arg, ConstInt) and (arg.getint() <= 0xFF or -1 * arg.getint() <= 0xFF)
+        argloc = regalloc.make_sure_var_in_reg(arg, imm_fine=imm_arg)
+        if argloc.is_imm():
+            self.mc.MOV_ri(resloc.value, argloc.getint())
+        else:
+            self.mc.MOV_rr(resloc.value, argloc.value)
+        regalloc.possibly_free_vars_for_op(op)
+
 class FieldOpAssembler(object):
 
     _mixin_ = True