[pypy-svn] r74642 - pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86
jcreigh at codespeak.net
jcreigh at codespeak.net
Fri May 21 18:42:12 CEST 2010
Author: jcreigh
Date: Fri May 21 18:42:10 2010
New Revision: 74642
Modified:
pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/assembler.py
pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py
Log:
fix AddressLoc, use it in a few places
Modified: pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/assembler.py
==============================================================================
--- pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/assembler.py (original)
+++ pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/assembler.py Fri May 21 18:42:10 2010
@@ -15,7 +15,8 @@
esp, ebp, esi, edi,
xmm0, xmm1, xmm2, xmm3,
xmm4, xmm5, xmm6, xmm7,
- RegLoc, StackLoc, ImmedLoc, imm)
+ RegLoc, StackLoc,
+ ImmedLoc, AddressLoc, imm)
from pypy.rlib.objectmodel import we_are_translated, specialize
from pypy.jit.backend.x86 import rx86, regloc, codebuf
@@ -828,21 +829,17 @@
assert isinstance(resloc, RegLoc)
size = size_loc.value
- # FIXME: Should be done in one instruction
- self.mc.PUSH(eax)
- self.mc.MOV(eax, base_loc)
- self.mc.ADD(eax, ofs_loc)
+ source_addr = AddressLoc(base_loc, ofs_loc)
if size == 1:
- self.mc.MOVZX8_rm(resloc.value, (eax.value, 0))
+ self.mc.MOVZX8(resloc, source_addr)
elif size == 2:
- self.mc.MOVZX16_rm(resloc.value, (eax.value, 0))
+ self.mc.MOVZX16(resloc, source_addr)
elif size == WORD:
- self.mc.MOV_rm(resloc.value, (eax.value, 0))
+ self.mc.MOV(resloc, source_addr)
elif size == 8:
- self.mc.MOVSD_rm(resloc.value, (eax.value, 0))
+ self.mc.MOVSD(resloc, source_addr)
else:
raise NotImplementedError("getfield size = %d" % size)
- self.mc.POP(eax)
genop_getfield_raw = genop_getfield_gc
genop_getfield_raw_pure = genop_getfield_gc
@@ -872,42 +869,31 @@
base_loc, ofs_loc, size_loc, value_loc = arglocs
assert isinstance(size_loc, ImmedLoc)
size = size_loc.value
- # FIXME: Should be done in one instruction
- self.mc.PUSH(eax)
- self.mc.PUSH(ebx)
- self.mc.MOV(eax, base_loc)
- self.mc.ADD(eax, ofs_loc)
- self.mc.MOV(ebx, value_loc)
+ dest_addr = AddressLoc(base_loc, ofs_loc)
if size == WORD * 2:
- self.mc.MOVSD_mr((eax.value, 0), ebx.value)
+ self.mc.MOVSD(dest_addr, value_loc)
elif size == WORD:
- self.mc.MOV_mr((eax.value, 0), ebx.value)
+ self.mc.MOV(dest_addr, value_loc)
elif size == 2:
- # XXX: Select 16-bit operand mode in a non-ugly way
- self.mc.writechar('\x66')
- self.mc.MOV_mr((eax.value, 0), ebx.value)
+ self.mc.MOV16(dest_addr, value_loc)
elif size == 1:
- self.mc.MOV8_mr((eax.value, 0), ebx.lowest8bits())
+ self.mc.MOV8(dest_addr, value_loc.lowest8bits())
else:
print "[asmgen]setfield addr size %d" % size
raise NotImplementedError("Addr size %d" % size)
- self.mc.POP(ebx)
- self.mc.POP(eax)
def genop_discard_setarrayitem_gc(self, op, arglocs):
base_loc, ofs_loc, value_loc, scale_loc, baseofs = arglocs
assert isinstance(baseofs, ImmedLoc)
assert isinstance(scale_loc, ImmedLoc)
+ dest_addr = AddressLoc(base_loc, ofs_loc, scale_loc.value, baseofs.value)
if op.args[2].type == FLOAT:
- self.mc.MOVSD(addr64_add(base_loc, ofs_loc, baseofs.value,
- scale_loc.value), value_loc)
+ self.mc.MOVSD(dest_addr, value_loc)
else:
if scale_loc.value == 2:
- self.mc.MOV(addr_add(base_loc, ofs_loc, baseofs.value,
- scale_loc.value), value_loc)
+ self.mc.MOV(dest_addr, value_loc)
elif scale_loc.value == 0:
- self.mc.MOV(addr8_add(base_loc, ofs_loc, baseofs.value,
- scale_loc.value), value_loc.lowest8bits())
+ self.mc.MOV8(dest_addr, value_loc.lowest8bits())
else:
raise NotImplementedError("scale = %d" % scale_loc.value)
@@ -916,17 +902,17 @@
basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.STR,
self.cpu.translate_support_code)
assert itemsize == 1
- self.mc.MOV(addr8_add(base_loc, ofs_loc, basesize),
- val_loc.lowest8bits())
+ dest_addr = AddressLoc(base_loc, ofs_loc, 0, basesize)
+ self.mc.MOV8(dest_addr, val_loc.lowest8bits())
def genop_discard_unicodesetitem(self, op, arglocs):
base_loc, ofs_loc, val_loc = arglocs
basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.UNICODE,
self.cpu.translate_support_code)
if itemsize == 4:
- self.mc.MOV(addr_add(base_loc, ofs_loc, basesize, 2), val_loc)
+ self.mc.MOV(AddressLoc(base_loc, ofs_loc, 2, basesize), val_loc)
elif itemsize == 2:
- self.mc.MOV16(addr_add(base_loc, ofs_loc, basesize, 1), val_loc)
+ self.mc.MOV16(AddressLoc(base_loc, ofs_loc, 1, basesize), val_loc)
else:
assert 0, itemsize
Modified: pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py
==============================================================================
--- pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py (original)
+++ pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py Fri May 21 18:42:10 2010
@@ -53,7 +53,8 @@
def lowest8bits(self):
# XXX: Only handling i386 al, cl, dl, bl for now
assert self.value < 4
- return self.value
+ assert not self.is_xmm
+ return self
def location_code(self):
return 'r'
@@ -79,14 +80,14 @@
_immutable_ = True
# The address is base_loc + (scaled_loc << scale) + static_offset
- def __init__(self, base_loc, scaled_loc, scale, static_offset):
+ def __init__(self, base_loc, scaled_loc, scale=0, static_offset=0):
assert 0 <= scale < 4
assert isinstance(base_loc, ImmedLoc) or isinstance(base_loc, RegLoc)
assert isinstance(scaled_loc, ImmedLoc) or isinstance(scaled_loc, RegLoc)
if isinstance(base_loc, ImmedLoc):
if isinstance(scaled_loc, ImmedLoc):
- self.location_code = 'j'
+ self._location_code = 'j'
self.value = base_loc.value + (scaled_loc.value << scale) + static_offset
else:
# FIXME
@@ -94,14 +95,14 @@
else:
if isinstance(scaled_loc, ImmedLoc):
# FIXME: What if base_loc is ebp or esp?
- self.location_code = 'm'
+ self._location_code = 'm'
self.value = (base_loc.value, (scaled_loc.value << scale) + static_offset)
else:
- self.location_code = 'a'
+ self._location_code = 'a'
self.value = (base_loc.value, scaled_loc.value, scale, static_offset)
def location_code(self):
- return self.location_code
+ return self._location_code
def value(self):
return self.value
@@ -125,12 +126,20 @@
ADD = _binaryop('ADD')
OR = _binaryop('OR')
+ XOR = _binaryop('XOR')
+
AND = _binaryop('AND')
SUB = _binaryop('SUB')
- XOR = _binaryop('XOR')
+ IMUL = _binaryop('IMUL')
+
MOV = _binaryop('MOV')
+ MOV8 = _binaryop('MOV8')
MOVSD = _binaryop('MOVSD')
- IMUL = _binaryop('IMUL')
+
+ def MOV16(self, dest_loc, src_loc):
+ # Select 16-bit operand mode
+ self.writechar('\x66')
+ self.MOV(dest_loc, src_loc)
def PUSH(self, loc):
assert isinstance(loc, RegLoc)
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