[pypy-svn] r75697 - in pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86: . test

jcreigh at codespeak.net jcreigh at codespeak.net
Wed Jun 30 20:55:53 CEST 2010


Author: jcreigh
Date: Wed Jun 30 20:55:51 2010
New Revision: 75697

Modified:
   pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py
   pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/rx86.py
   pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/test/test_regloc.py
Log:
32-bit fixes

Modified: pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py
==============================================================================
--- pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py	(original)
+++ pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/regloc.py	Wed Jun 30 20:55:51 2010
@@ -230,11 +230,12 @@
             for possible_code in unrolling_location_codes:
                 if code == possible_code:
                     val = getattr(loc, "value_" + possible_code)()
-                    if self.WORD == 8 and possible_code == 'i':
+                    if possible_code == 'i':
                         offset = val - (self.tell() + 5)
                         if rx86.fits_in_32bits(offset):
                             _rx86_getattr(self, name + "_l")(val)
                         else:
+                            assert self.WORD == 8
                             self.MOV_ri(X86_64_SCRATCH_REG.value, val)
                             _rx86_getattr(self, name + "_r")(X86_64_SCRATCH_REG.value)
                     else:

Modified: pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/rx86.py
==============================================================================
--- pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/rx86.py	(original)
+++ pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/rx86.py	Wed Jun 30 20:55:51 2010
@@ -437,6 +437,11 @@
     CMP_rm = insn(rex_w, '\x3B', register(1, 8), mem_reg_plus_const(2))
     CMP_mr = insn(rex_w, '\x39', register(2, 8), mem_reg_plus_const(1))
 
+    CMP_ji8 = insn(rex_w, '\x83', '\x3D', immediate(1), immediate(2, 'b'))
+    CMP_ji32 = insn(rex_w, '\x81', '\x3D', immediate(1), immediate(2))
+    CMP_ji = select_8_or_32_bit_immed(CMP_ji8, CMP_ji32)
+    CMP_rj = insn(rex_w, '\x3B', register(1, 8), '\x05', immediate(2))
+
     AND8_rr = insn(rex_w, '\x20', byte_register(1), byte_register(2,8), '\xC0')
 
     OR8_rr = insn(rex_w, '\x08', byte_register(1), byte_register(2,8), '\xC0')
@@ -544,11 +549,6 @@
 class X86_32_CodeBuilder(AbstractX86CodeBuilder):
     WORD = 4
 
-    CMP_ji8 = insn(rex_w, '\x83', '\x3D', immediate(1), immediate(2, 'b'))
-    CMP_ji32 = insn(rex_w, '\x81', '\x3D', immediate(1), immediate(2))
-    CMP_ji = select_8_or_32_bit_immed(CMP_ji8, CMP_ji32)
-    CMP_rj = insn(rex_w, '\x3B', register(1, 8), '\x05', immediate(2))
-
 class X86_64_CodeBuilder(AbstractX86CodeBuilder):
     WORD = 8
 

Modified: pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/test/test_regloc.py
==============================================================================
--- pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/test/test_regloc.py	(original)
+++ pypy/branch/x86-64-jit-backend/pypy/jit/backend/x86/test/test_regloc.py	Wed Jun 30 20:55:51 2010
@@ -1,6 +1,8 @@
 from pypy.jit.backend.x86.regloc import *
 from pypy.jit.backend.x86.test.test_rx86 import CodeBuilder32, CodeBuilder64, assert_encodes_as
 from pypy.jit.backend.x86.assembler import heap
+from pypy.jit.backend.x86.arch import IS_X86_64
+import py.test
 
 class LocationCodeBuilder32(CodeBuilder32, LocationCodeBuilder):
     pass
@@ -20,6 +22,9 @@
     assert_encodes_as(cb32, "CMP16", (ecx, ImmedLoc(12345)), '\x66\x81\xF9\x39\x30')
 
 def test_reuse_scratch_register():
+    if not IS_X86_64:
+        py.test.skip()
+
     base_addr = 0xFEDCBA9876543210
     cb = LocationCodeBuilder64()
     cb.begin_reuse_scratch_register()



More information about the Pypy-commit mailing list