[pypy-svn] r63763 - in pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86: . test

[fijal at codespeak.net]

Author: fijal
Date: Tue Apr  7 03:06:36 2009
New Revision: 63763

Modified:
   pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/assembler.py
   pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/test/test_runner.py
Log:
fix some bugs related to address computations


Modified: pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/assembler.py
==============================================================================
--- pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/assembler.py	(original)
+++ pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/assembler.py	Tue Apr  7 03:06:36 2009
@@ -434,7 +434,7 @@
         self.mc.SAR(resloc, cl)
 
     def genop_uint_rshift(self, op, arglocs, resloc):
-        return
+        raise NotImplementedError("uint rshift")
         self.mc.MOV(eax, gv_x.operand(self))
         self.mc.MOV(ecx, gv_y.operand(self))
         self.mc.SHR(eax, cl)
@@ -821,7 +821,7 @@
             return heap(reg_or_imm1.value + offset +
                         (reg_or_imm2.value << scale))
         else:
-            return mem(reg_or_imm2, (reg_or_imm1.value << scale) + offset)
+            return memSIB(None, reg_or_imm2, scale, reg_or_imm1.value + offset)
     else:
         if isinstance(reg_or_imm2, IMM32):
             return mem(reg_or_imm1, offset + (reg_or_imm2.value << scale))
@@ -834,7 +834,7 @@
             return heap8(reg_or_imm1.value + (offset << scale) +
                          reg_or_imm2.value)
         else:
-            return mem8(reg_or_imm2, reg_or_imm1.value + (offset << scale))
+            return memSIB8(None, reg_or_imm2, scale, reg_or_imm1.value + offset)
     else:
         if isinstance(reg_or_imm2, IMM32):
             return mem8(reg_or_imm1, (offset << scale) + reg_or_imm2.value)
@@ -847,7 +847,7 @@
             return heap16(reg_or_imm1.value + (offset << scale) +
                          reg_or_imm2.value)
         else:
-            return mem16(reg_or_imm2, reg_or_imm1.value + (offset << scale))
+            return memSIB16(None, reg_or_imm2, scale, reg_or_imm1.value + offset)
     else:
         if isinstance(reg_or_imm2, IMM32):
             return mem16(reg_or_imm1, (offset << scale) + reg_or_imm2.value)

Modified: pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/test/test_runner.py
==============================================================================
--- pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/test/test_runner.py	(original)
+++ pypy/branch/pyjitpl5-simplify/pypy/jit/backend/x86/test/test_runner.py	Tue Apr  7 03:06:36 2009
@@ -256,6 +256,19 @@
         r = self.execute_operation(rop.GETARRAYITEM_GC, [res, ConstInt(2)],
                                    'int', descr)
         assert r.value == 38
+        r = self.execute_operation(rop.GETARRAYITEM_GC, [res.constbox(),
+                                                         BoxInt(2)],
+                                   'int', descr)
+        assert r.value == 38
+        r = self.execute_operation(rop.GETARRAYITEM_GC, [res.constbox(),
+                                                         ConstInt(2)],
+                                   'int', descr)
+        assert r.value == 38
+        r = self.execute_operation(rop.GETARRAYITEM_GC, [res,
+                                                         BoxInt(2)],
+                                   'int', descr)
+        assert r.value == 38
+        
         r = self.execute_operation(rop.GETARRAYITEM_GC, [res, BoxInt(3)],
                                    'int', descr)
         assert r.value == 42