[pypy-svn] r59452 - in pypy/branch/oo-jit/pypy/jit/codegen/x86_64: . test
witulski at codespeak.net
witulski at codespeak.net
Mon Oct 27 17:46:04 CET 2008
Author: witulski
Date: Mon Oct 27 17:46:01 2008
New Revision: 59452
Modified:
pypy/branch/oo-jit/pypy/jit/codegen/x86_64/assembler.py
pypy/branch/oo-jit/pypy/jit/codegen/x86_64/rgenop.py
pypy/branch/oo-jit/pypy/jit/codegen/x86_64/test/test_rgenop.py
Log:
Implemented int_abs (stolen from the other backend ;) )
Modified: pypy/branch/oo-jit/pypy/jit/codegen/x86_64/assembler.py
==============================================================================
--- pypy/branch/oo-jit/pypy/jit/codegen/x86_64/assembler.py (original)
+++ pypy/branch/oo-jit/pypy/jit/codegen/x86_64/assembler.py Mon Oct 27 17:46:01 2008
@@ -236,6 +236,7 @@
#_POP_QWREG = make_one_operand_instr_with_alternate_encoding(1,0,0,None,"58",None,None)
#_PUSH_QWREG = make_one_operand_instr_with_alternate_encoding(1,0,0,None,"50",None,None)
+ _SBB_QWREG_QWREG = make_two_operand_instr( 1, None, 0, None, "\x19", 3, None, None)
_SETE_8REG = make_one_operand_instr( 0, 0, 0, 0, "\x0F", 3, None, 0, 4)
_SETG_8REG = make_one_operand_instr( 0, 0, 0, 0, "\x0F", 3, None, 0, 15)
_SETGE_8REG = make_one_operand_instr( 0, 0, 0, 0, "\x0F", 3, None, 0, 13)
@@ -342,6 +343,10 @@
def RET(self):
self.write("\xC3")
+ def SBB(self, op1, op2):
+ method = getattr(self, "_SBB"+op1.to_string()+op2.to_string())
+ method(op1, op2)
+
def SETG(self, op1):
method = getattr(self, "_SETG"+op1.to_string())
method(op1)
Modified: pypy/branch/oo-jit/pypy/jit/codegen/x86_64/rgenop.py
==============================================================================
--- pypy/branch/oo-jit/pypy/jit/codegen/x86_64/rgenop.py (original)
+++ pypy/branch/oo-jit/pypy/jit/codegen/x86_64/rgenop.py Mon Oct 27 17:46:01 2008
@@ -251,6 +251,18 @@
op_int_invert = op_int_not
+ # stolen from the ia32 backend :)
+ def op_int_abs(self, gv_x):
+ gv_y = self.allocate_register()
+ gv_z = self.allocate_register(None, [gv_y])
+ [gv_x] = self.move_to_registers([gv_x], [gv_y, gv_z], move_imm_too=True)
+ self.mc.MOV(gv_z, gv_x)
+ self.mc.ADD(gv_x, gv_x)
+ self.mc.SBB(gv_x, gv_z)
+ self.mc.SBB(gv_y, gv_y)
+ self.mc.XOR(gv_x, gv_y)
+ return gv_x
+
# if a register contains a constant
# it will be marked to be don't spilled
def throw_away_if_const(self, registers):
Modified: pypy/branch/oo-jit/pypy/jit/codegen/x86_64/test/test_rgenop.py
==============================================================================
--- pypy/branch/oo-jit/pypy/jit/codegen/x86_64/test/test_rgenop.py (original)
+++ pypy/branch/oo-jit/pypy/jit/codegen/x86_64/test/test_rgenop.py Mon Oct 27 17:46:01 2008
@@ -551,6 +551,21 @@
result = fnptr(-43)
assert result == 42
+ def test_abs(self):
+ abs_func = make_one_op_instr(self.RGenOp(), "int_abs")
+ fnptr = self.cast(abs_func, 1)
+ result = fnptr(1)
+ assert result == 1
+ result = fnptr(123)
+ assert result == 123
+ result = fnptr(-1)
+ assert result == 1
+ result = fnptr(-123)
+ assert result == 123
+ result = fnptr(0)
+ assert result == 0
+
+
test_switch_many_args_direct = skip
test_directtesthelper_direct = skip
@@ -585,7 +600,6 @@
test_from_random_5_direct = skip
test_genzeroconst = skip
test_ovfcheck1_direct = skip
- test_ovfcheck2_direct = skip
test_cast_direct = skip
test_array_of_ints = skip
test_interior_access = skip
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