[pypy-svn] r52972 - in pypy/branch/gameboy-emulator/pypy/lang/gameboy: . test
cami at codespeak.net
cami at codespeak.net
Thu Mar 27 00:42:06 CET 2008
Author: cami
Date: Thu Mar 27 00:42:04 2008
New Revision: 52972
Modified:
pypy/branch/gameboy-emulator/pypy/lang/gameboy/cartridge.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/cpu.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/gameboy.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/interrupt.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/joypad.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/ram.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/serial.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/sound.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_cpu.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_interrupt.py
pypy/branch/gameboy-emulator/pypy/lang/gameboy/timer.py
Log:
changed source formattings
changed doc strings
added test templates for interrupt
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/cartridge.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/cartridge.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/cartridge.py Thu Mar 27 00:42:04 2008
@@ -164,34 +164,29 @@
def write(self, address, data):
pass
-
-
-"""
-PyBoy GameBoy (TM) Emulator
-Memory Bank Controller 1 (2MB constants.ROM, 32KB constants.RAM)
-
-0000-3FFF ROM Bank 0 (16KB)
-4000-7FFF ROM Bank 1-127 (16KB)
-A000-BFFF RAM Bank 0-3 (8KB)
- """
class MBC1(MBC):
+ """
+ PyBoy GameBoy (TM) Emulator
+ Memory Bank Controller 1 (2MB constants.ROM, 32KB constants.RAM)
+
+ 0000-3FFF ROM Bank 0 (16KB)
+ 4000-7FFF ROM Bank 1-127 (16KB)
+ A000-BFFF RAM Bank 0-3 (8KB)
+ """
def __init__(self, rom, ram):
self.minRamBankSize = 0
self.maxRamBankSize = 4
self.minRomBankSize = 2
self.maxRomBankSize = 128
-
self.setRom(rom)
self.serRam(ram)
-
def reset(self):
super.reset()
self.memoryModel = 0
-
def write(self, address, data):
if (address <= 0x1FFF): # 0000-1FFF
if (self.ramSize > 0):
@@ -216,17 +211,17 @@
-"""
-PyBoy GameBoy (TM) Emulator
-
-Memory Bank Controller 2 (256KB constants.ROM, 512x4bit constants.RAM)
-
-0000-3FFF ROM Bank 0 (16KB)
-4000-7FFF ROM Bank 1-15 (16KB)
-A000-A1FF RAM Bank (512x4bit)
- """
-
class MBC2(MBC):
+ """
+ PyBoy GameBoy (TM) Emulator
+
+ Memory Bank Controller 2 (256KB constants.ROM, 512x4bit constants.RAM)
+
+ 0000-3FFF ROM Bank 0 (16KB)
+ 4000-7FFF ROM Bank 1-15 (16KB)
+ A000-A1FF RAM Bank (512x4bit)
+ """
+
RAM_BANK_SIZE = 512
def __init__(self, rom, ram):
@@ -278,18 +273,20 @@
self.memoryModel = data & 0x01
elif (address >= 0xA000 and address <= 0xBFFF and self.ramEnable): # A000-BFFF
self.ram[self.ramBank + (address & 0x1FFF)] = data
-"""
-PyBoy GameBoy (TM) Emulator
-Memory Bank Controller 3 (2MB constants.ROM, 32KB constants.RAM, Real Time Clock)
-0000-3FFF ROM Bank 0 (16KB)
-4000-7FFF ROM Bank 1-127 (16KB)
-A000-BFFF RAM Bank 0-3 (8KB)
-"""
class MBC3(MBC):
-
+ """
+ PyBoy GameBoy (TM) Emulator
+
+ Memory Bank Controller 3 (2MB constants.ROM, 32KB constants.RAM, Real Time Clock)
+
+ 0000-3FFF ROM Bank 0 (16KB)
+ 4000-7FFF ROM Bank 1-127 (16KB)
+ A000-BFFF RAM Bank 0-3 (8KB)
+ """
+
clockSeconds = 0
clockMinutes = 0
clockHours = 0
@@ -417,18 +414,16 @@
-"""
-PyBoy GameBoy (TM) Emulator
-
-Memory Bank Controller 5 (8MB constants.ROM, 128KB constants.RAM)
- *
-0000-3FFF ROM Bank 0 (16KB)
-4000-7FFF ROM Bank 1-511 (16KB)
-A000-BFFF RAM Bank 0-15 (8KB)
-"""
-
class MBC5(MBC):
-
+ """
+ PyBoy GameBoy (TM) Emulator
+
+ Memory Bank Controller 5 (8MB constants.ROM, 128KB constants.RAM)
+ *
+ 0000-3FFF ROM Bank 0 (16KB)
+ 4000-7FFF ROM Bank 1-511 (16KB)
+ A000-BFFF RAM Bank 0-15 (8KB)
+ """
def __init__(self, rom, ram, rumble):
self.minRamBankSize = 0
self.maxRamBankSize = 16
@@ -464,17 +459,16 @@
super.__init__(self, ram, rom)
-"""
-PyBoy GameBoy (TM) Emulator
-
-Hudson Memory Bank Controller 3 (2MB constants.ROM, 128KB constants.RAM, constants.RTC)
-
-0000-3FFF ROM Bank 0 (16KB)
-4000-7FFF ROM Bank 1-127 (16KB)
-A000-BFFF RAM Bank 0-15 (8KB)
-"""
class HuC3(MBC):
-
+ """
+ PyBoy GameBoy (TM) Emulator
+
+ Hudson Memory Bank Controller 3 (2MB constants.ROM, 128KB constants.RAM, constants.RTC)
+
+ 0000-3FFF ROM Bank 0 (16KB)
+ 4000-7FFF ROM Bank 1-127 (16KB)
+ A000-BFFF RAM Bank 0-15 (8KB)
+ """
def __init__(self, rom, ram, clock):
self.minRamBankSize = 0
self.maxRamBankSize = 4
@@ -528,6 +522,7 @@
pass
elif (self.ramFlag == 0x0A and self.ramSize > 0):
self.ram[self.ramBank + (address & 0x1FFF)] = data
+
def writeWithRamFlag0x0B(self, address, data):
if ((data & 0xF0) == 0x10):
@@ -551,6 +546,7 @@
pass
elif ((data & 0xF0) == 0x60):
self.ramValue = 0x01
+
def updateClock(self):
now = self.clock.getTime()
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/cpu.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/cpu.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/cpu.py Thu Mar 27 00:42:04 2008
@@ -96,7 +96,6 @@
Central Unit ProcessOR (Sharp LR35902 CPU)
"""
-
def __init__(self, interrupt, memory):
self.interrupt = interrupt
self.memory = memory
@@ -240,9 +239,6 @@
def execute(self, opCode):
OP_CODES[opCode](self)
- def reverseArgumentsDoubleRegister(self, register, getter):
- pass
-
# memory Access, 1 cycle
def read(self, hi, lo=None):
address = hi
@@ -340,7 +336,7 @@
self.cycles -= 1
# 1 cycle
- def adc(self, getter, setter=None):
+ def addWithCarry(self, getter, setter=None):
s = self.a.get() + getter() + ((self.f.get() & constants.C_FLAG) >> 4)
self.f.set(0, False)
self.zeroFlagAdd(s)
@@ -351,7 +347,7 @@
self.a.set(s & 0xFF) # 1 cycle
# 1 cycle
- def sbc(self, getter, setter=None):
+ def subtractWithCarry(self, getter, setter=None):
s = self.a.get() - getter() - ((self.f.get() & constants.C_FLAG) >> 4)
self.f.set(constants.N_FLAG, False)
self.zeroFlagAdd(s)
@@ -362,7 +358,7 @@
self.a.set(s & 0xFF) # 1 cycle
# 1 cycle
- def sub(self, getter, setter=None):
+ def subtract(self, getter, setter=None):
self.compareA(getter, setter) # 1 cycle
self.a.sub(getter(useCycles=False), False)
@@ -420,49 +416,75 @@
setter(data) # 1 cycle
# 1 cycle
- def rlc(self, getter, setter):
+ def rotateLeftCircular(self, getter, setter):
s = ((getter() & 0x7F) << 1) + ((getter() & 0x80) >> 7)
- flagsAndSetterFinish(s, setter, 0x80)
+ self.flagsAndSetterFinish(s, setter, 0x80)
+
+ # rotateLeftCircularA 1 cycle
+ def rotateLeftCircularA(self):
+ self.cFlagAdd(self.a.get(), 0x80, resetF=True)
+ self.a.set(((self.a.get() & 0x7F) << 1) + ((self.a.get() & 0x80) >> 7))
+
# 1 cycle
- def rl(self, getter, setter):
+ def rotateLeft(self, getter, setter):
s = ((getter() & 0x7F) << 1)
if (self.f.get() & constants.C_FLAG) != 0:
s += 0x01
- flagsAndSetterFinish(s, setter, 0x80) # 1 cycle
+ self.flagsAndSetterFinish(s, setter, 0x80) # 1 cycle
+ # RLA 1 cycle
+ def rotateLeftA(self):
+ s = ((self.a.get() & 0x7F) << 1)
+ if (self.f.get() & constants.C_FLAG) != 0:
+ s += 0x01
+ self.cFlagAdd(self.a.get(), 0x80, resetF=True)
+ self.a.set(s) # 1 cycle
+
# 1 cycle
- def rrc(self, getter, setter):
+ def rotateRightCircular(self, getter, setter):
s = (getter() >> 1) + ((getter() & 0x01) << 7)
- flagsAndSetterFinish(s, setter) # 1 cycle
+ self.flagsAndSetterFinish(s, setter) # 1 cycle
+
+ # RRCA 1 cycle
+ def rotateRightCircularA(self):
+ self.cFlagAdd(self.a.get(), resetF=True)
+ self.a.set(((self.a.get() >> 1) & 0x7F) + ((self.a.get() << 7) & 0x80)) #1 cycle
# 1 cycle
- def rr(self, getter, setter):
+ def rotateRight(self, getter, setter):
s = (getter() >> 1) + ((self.f.get() & constants.C_FLAG) << 3)
- flagsAndSetterFinish(s, setter) # 1 cycle
+ self.flagsAndSetterFinish(s, setter) # 1 cycle
+
+ # RRA 1 cycle
+ def rotateRightA(self):
+ s = ((self.a.get() >> 1) & 0x7F)
+ if (self.f.get() & constants.C_FLAG) != 0:
+ s += 0x80
+ self.cFlagAdd(self.a.get(), resetF=True)
+ self.a.set(s) # 1 cycle
# 2 cycles
- def sla(self, getter, setter):
+ def shiftLeftArithmetic(self, getter, setter):
s = (getter() << 1) & 0xFF
- flagsAndSetterFinish(s, setter, 0x80) # 1 cycle
+ self.flagsAndSetterFinish(s, setter, 0x80) # 1 cycle
# 1 cycle
- def sra(self, getter, setter):
+ def shiftRightArithmetic(self, getter, setter):
s = (getter() >> 1) + (getter() & 0x80)
- flagsAndSetterFinish(s, setter) # 1 cycle
+ self.flagsAndSetterFinish(s, setter) # 1 cycle
- # 1 cycle
- def srl(self, getter, setter):
+ # 2 cycles
+ def shiftWordRightLogical(self, getter, setter):
s = (getter() >> 1)
- flagsAndSetterFinish(s, setter) # 1 cycle
+ self.flagsAndSetterFinish(s, setter) # 2 cycles
- # 1 cycle
+ # 2 cycles
def flagsAndSetterFinish(self, s, setter, compareAnd=0x01):
self.f.set(0) # 1 cycle
self.zeroFlagAdd(s)
- # XXX where does "getter" come from here? should be "setter"?
- self.cFlagAdd(getter(), compareAnd)
- setter(s)
+ self.cFlagAdd(s, compareAnd)
+ setter(s) # 1 cycle
# 1 cycle
def swap(self, getter, setter):
@@ -472,45 +494,19 @@
setter(s)
# 2 cycles
- def bit(self, getter, setter, n):
+ def testBit(self, getter, setter, n):
self.f.set((self.f.get() & constants.C_FLAG) + constants.H_FLAG, False)
if (getter() & (1 << n)) == 0:
self.f.add(constants.Z_FLAG, False)
self.cycles -= 2
- # RLCA 1 cycle
- def rlca(self):
- self.cFlagAdd(self.a.get(), 0x80, resetF=True)
- self.a.set(((self.a.get() & 0x7F) << 1) + ((self.a.get() & 0x80) >> 7))
-
- # RLA 1 cycle
- def rla(self):
- s = ((self.a.get() & 0x7F) << 1)
- if (self.f.get() & constants.C_FLAG) != 0:
- s += 0x01
- self.cFlagAdd(self.a.get(), 0x80, resetF=True)
- self.a.set(s) # 1 cycle
-
- # RRCA 1 cycle
- def rrca(self):
- self.cFlagAdd(self.a.get(), resetF=True)
- self.a.set(((self.a.get() >> 1) & 0x7F) + ((self.a.get() << 7) & 0x80)) #1 cycle
-
- # RRA 1 cycle
- def rra(self):
- s = ((self.a.get() >> 1) & 0x7F)
- if (self.f.get() & constants.C_FLAG) != 0:
- s += 0x80
- self.cFlagAdd(self.a.get(), resetF=True)
- self.a.set(s) # 1 cycle
-
# 2 cycles
- def set(self, getter, setter, n):
+ def setBit(self, getter, setter, n):
self.cycles -= 1 # 1 cycle
setter(getter() | (1 << n)) # 1 cycle
# 1 cycle
- def res(self, getter, setter, n):
+ def resetBit(self, getter, setter, n):
setter(getter() & (~(1 << n))) # 1 cycle
# LD A,(nnnn), 4 cycles
@@ -559,14 +555,14 @@
def ldh_A_Ci(self):
self.a.set(self.read(0xFF00 + self.bc.getLo())) # 1+2 cycles
- # LDI A,(HL) 2 cycles
- def ldi_A_HLi(self):
+ # loadAndIncrement A,(HL) 2 cycles
+ def loadAndIncrement_A_HLi(self):
self.a.set(self.read(self.hl.get())) # 2 cycles
self.hl.inc()# 2 cycles
self.cycles += 2
- # LDD A,(HL) 2 cycles
- def ldd_A_HLi(self):
+ # loadAndDecrement A,(HL) 2 cycles
+ def loadAndDecrement_A_HLi(self):
self.a.set(self.read(self.hl.get())) # 2 cycles
self.hl.dec() # 2 cycles
self.cycles += 2
@@ -579,14 +575,14 @@
def ldh_Ci_A(self):
self.write(0xFF00 + self.bc.getLo(), self.a.get()) # 2 cycles
- # LDI (HL),A 2 cycles
- def ldi_HLi_A(self):
+ # loadAndIncrement (HL),A 2 cycles
+ def loadAndIncrement_HLi_A(self):
self.write(self.hl.get(), self.a.get()) # 2 cycles
self.hl.inc() # 2 cycles
self.cycles += 2
- # LDD (HL),A 2 cycles
- def ldd_HLi_A(self):
+ # loadAndDecrement (HL),A 2 cycles
+ def loadAndDecrement_HLi_A(self):
self.write(self.hl.get(), self.a.get()) # 2 cycles
self.hl.dec() # 2 cycles
self.cycles += 2
@@ -596,7 +592,7 @@
self.sp.set(self.hl.get()) # 1 cycle
self.cycles -= 1
- def cpl(self):
+ def complementA(self):
self.a.set(self.a.get() ^ 0xFF, False)
self.f.set(self.f.get() | (constants.N_FLAG + constants.H_FLAG))
@@ -721,7 +717,7 @@
self.pc.set(hi, lo) # 2 cycles
# RET cc 2,5 cycles
- def ret_cc(self, cc):
+ def conditionalReturn(self, cc):
if cc:
self.ret() # 4 cycles
# FIXME maybe this should be the same
@@ -730,7 +726,7 @@
self.cycles -= 2
# RETI 4 cycles
- def reti(self):
+ def returnFormInterrupt(self):
self.ret() # 4 cycles
# enable interrupts
self.ime = True
@@ -744,13 +740,13 @@
self.call(nn) # 4 cycles
# DI/EI 1 cycle
- def di(self):
+ def disableInterrupts(self):
# disable interrupts
self.ime = False
self.cycles -= 1;
# 1 cycle
- def ei(self):
+ def enableInterrupts(self):
# enable interrupts
self.ime = True
self.cycles -= 1
@@ -851,30 +847,30 @@
(0x18, CPU.jr_nn),
(0x02, CPU.ld_BCi_A),
(0x12, CPU.ld_DEi_A),
- (0x22, CPU.ldi_HLi_A),
- (0x32, CPU.ldd_HLi_A),
+ (0x22, CPU.loadAndIncrement_HLi_A),
+ (0x32, CPU.loadAndDecrement_HLi_A),
(0x0A, CPU.ld_A_BCi),
(0x1A, CPU.load_A_DEi),
- (0x2A, CPU.ldi_A_HLi),
- (0x3A, CPU.ldd_A_HLi),
- (0x07, CPU.rlca),
- (0x0F, CPU.rrca),
- (0x17, CPU.rla),
- (0x1F, CPU.rra),
+ (0x2A, CPU.loadAndIncrement_A_HLi),
+ (0x3A, CPU.loadAndDecrement_A_HLi),
+ (0x07, CPU.rotateLeftCircularA),
+ (0x0F, CPU.rotateRightCircularA),
+ (0x17, CPU.rotateLeftA),
+ (0x1F, CPU.rotateRightA),
(0x27, CPU.daa),
- (0x2F, CPU.cpl),
+ (0x2F, CPU.complementA),
(0x37, CPU.scf),
(0x3F, CPU.ccf),
(0x76, CPU.halt),
- (0xF3, CPU.di),
- (0xFB, CPU.ei),
+ (0xF3, CPU.disableInterrupts),
+ (0xFB, CPU.enableInterrupts),
(0xE2, CPU.ldh_Ci_A),
(0xEA, CPU.ld_mem_A),
(0xF2, CPU.ldh_A_Ci),
(0xFA, CPU.ld_A_mem),
(0xC3, CPU.jp_nnnn),
(0xC9, CPU.ret),
- (0xD9, CPU.reti),
+ (0xD9, CPU.returnFormInterrupt),
(0xE9, CPU.ld_pc_hl),
(0xF9, CPU.ld_SP_HL),
(0xE0, CPU.ldh_mem_A),
@@ -884,9 +880,9 @@
(0xCB, CPU.fetchExecute),
(0xCD, CPU.call_nnnn),
(0xC6, lambda s: CPU.addA(s, s.fetch)),
- (0xCE, lambda s: CPU.adc(s, s.fetch)),
- (0xD6, lambda s: CPU.sub(s, s.fetch)),
- (0xDE, lambda s: CPU.sbc(s, s.fetch)),
+ (0xCE, lambda s: CPU.addWithCarry(s, s.fetch)),
+ (0xD6, lambda s: CPU.subtract(s, s.fetch)),
+ (0xDE, lambda s: CPU.subtractWithCarry(s, s.fetch)),
(0xE6, lambda s: CPU.AND(s, s.fetch)),
(0xEE, lambda s: CPU.XOR(s, s.fetch)),
(0xF6, lambda s: CPU.OR(s, s.fetch)),
@@ -906,15 +902,15 @@
(0x05, 0x08, CPU.dec),
(0x06, 0x08, CPU.loadFetchRegister),
(0x80, 0x01, CPU.addA),
- (0x88, 0x01, CPU.adc),
- (0x90, 0x01, CPU.sub),
- (0x98, 0x01, CPU.sbc),
+ (0x88, 0x01, CPU.addWithCarry),
+ (0x90, 0x01, CPU.subtract),
+ (0x98, 0x01, CPU.subtractWithCarry),
(0xA0, 0x01, CPU.AND),
(0xA8, 0x01, CPU.XOR),
(0xB0, 0x01, CPU.OR),
(0xB8, 0x01, CPU.compareA),
(0x06, 0x08, CPU.fetchLoad),
- (0x40, 0x01, CPU.res, range(0, 8))
+ (0x40, 0x01, CPU.resetBit, range(0, 8))
]
@@ -926,7 +922,7 @@
(0x09, 0x10, CPU.addHL, REGISTER_SET_A),
(0x03, 0x10, CPU.incDoubleRegister, REGISTER_SET_A),
(0x0B, 0x10, CPU.decDoubleRegister, REGISTER_SET_A),
- (0xC0, 0x08, CPU.ret_cc, REGISTER_SET_B),
+ (0xC0, 0x08, CPU.conditionalReturn, REGISTER_SET_B),
(0xC2, 0x08, CPU.jp_cc_nnnn, REGISTER_SET_B),
(0xC4, 0x08, CPU.call_cc_nnnn, REGISTER_SET_B),
(0x20, 0x08, CPU.jr_cc_nn, REGISTER_SET_B),
@@ -935,17 +931,17 @@
]
SECOND_ORDER_REGISTER_GROUP_OP_CODES = [
- (0x00, 0x01, CPU.rlc),
- (0x08, 0x01, CPU.rrc),
- (0x10, 0x01, CPU.rl),
- (0x18, 0x01, CPU.rr),
- (0x20, 0x01, CPU.sla),
- (0x28, 0x01, CPU.sra),
+ (0x00, 0x01, CPU.rotateLeftCircular),
+ (0x08, 0x01, CPU.rotateRightCircular),
+ (0x10, 0x01, CPU.rotateLeft),
+ (0x18, 0x01, CPU.rotateRight),
+ (0x20, 0x01, CPU.shiftLeftArithmetic),
+ (0x28, 0x01, CPU.shiftRightArithmetic),
(0x30, 0x01, CPU.swap),
- (0x38, 0x01, CPU.srl),
- (0x40, 0x01, CPU.bit, range(0, 8)),
- (0xC0, 0x01, CPU.set, range(0, 8)),
- (0x80, 0x01, CPU.res, range(0, 8))
+ (0x38, 0x01, CPU.shiftWordRightLogical),
+ (0x40, 0x01, CPU.testBit, range(0, 8)),
+ (0xC0, 0x01, CPU.setBit, range(0, 8)),
+ (0x80, 0x01, CPU.resetBit, range(0, 8))
]
# RAW OPCODE TABLE INITIALIZATION ----------------------------------------------
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/gameboy.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/gameboy.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/gameboy.py Thu Mar 27 00:42:04 2008
@@ -8,17 +8,6 @@
class GameBoy(object):
- # RAM
- ram = None
- cartridge = None
- interrupt = None
- cpu = None
- serial = None
- timer = None
- joypad = None
- video = None
- sound = None
-
def __init__(self, videoDriver, soundDriver, joypadDriver, storeDriver, clockDriver):
self.ram = RAM()
self.cartridge = Cartridge(storeDriver, clockDriver)
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/interrupt.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/interrupt.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/interrupt.py Thu Mar 27 00:42:04 2008
@@ -6,7 +6,7 @@
Interrupt Controller
"""
-
+
def __init__(self):
self.reset()
@@ -14,11 +14,11 @@
self.enable = 0
self.flag = constants.VBLANK
- def isPending(self):
- return (self.enable & self.flag) != 0
-
- def isPending(self, mask):
- return (self.enable & self.flag & mask) != 0
+ def isPending(self, mask=None):
+ if mask==None:
+ return (self.enable & self.flag) != 0
+ else:
+ return (self.enable & self.flag & mask) != 0
def raiseInterrupt(self, mask):
self.flag |= mask
@@ -48,6 +48,5 @@
def setInterruptEnable(self, data):
self.enable = data
-
def setInterruptFlag(self, data):
self.flag = data
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/joypad.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/joypad.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/joypad.py Thu Mar 27 00:42:04 2008
@@ -1,57 +1,42 @@
-"""
-PyBoy GameBoy (TM) Emulator
-
-Joypad Input
-"""
-class Joypad(object):
-
- # Registers
- joyp = 0
- cycles = 0
+from pypy.lang.gameboy import constants
- # Interrupt Controller
- interrupt = None
-
- # Driver JoypadDriver
- driver = None
+class Joypad(object):
+ """
+ PyBoy GameBoy (TM) Emulator
+
+ Joypad Input
+ """
def __init__(self, joypadDriver, interrupt):
self.driver = joypadDriver
self.interrupt = interrupt
self.reset()
-
- def reset(self):
+ def reset(self):
self.joyp = 0xFF
self.cycles = constants.JOYPAD_CLOCK
-
def cycles(self):
return self.cycles
-
- def emulate(self, ticks):
+ def emulate(self, ticks):
self.cycles -= ticks
if (self.cycles <= 0):
if (self.driver.isRaised()):
self.update()
-
self.cycles = constants.JOYPAD_CLOCK
-
- def write(self, address, data):
+ def write(self, address, data):
if (address == constants.JOYP):
self.joyp = (self.joyp & 0xCF) + (data & 0x30)
self.update()
-
def read(self, address):
if (address == constants.JOYP):
return self.joyp
return 0xFF
-
def update(self):
data = self.joyp & 0xF0
@@ -68,3 +53,12 @@
self.joyp = data
+
+
+class Driver(object):
+
+ def getButtons(self):
+ pass
+
+ def getDirections(self):
+ pass
\ No newline at end of file
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/ram.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/ram.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/ram.py Thu Mar 27 00:42:04 2008
@@ -7,18 +7,14 @@
from pypy.lang.gameboy import constants
class RAM(object):
-
- # Work RAM
- wram = []
-
- # High RAM
- hram = []
def __init__(self):
self.reset()
def reset(self):
+ # Work RAM
self.wram = [0x00]*8192
+ # High RAM
self.hram = [0x00]*128
def write(self, address, data):
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/serial.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/serial.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/serial.py Thu Mar 27 00:42:04 2008
@@ -1,18 +1,10 @@
-"""
-PyBoy GameBoy (TM) Emulator
-Serial Link Controller
- """
from pypy.lang.gameboy import constants
class Serial(object):
-
- # Registers
- sb = 0
- sc = 0
- cycles = 0
-
- # Interrupt Controller #Interrupt
- interrupt = None
+ """
+ PyBoy GameBoy (TM) Emulator
+ Serial Link Controller
+ """
def __init__(self, interrupt):
self.interrupt = interrupt
@@ -29,12 +21,10 @@
def emulate(self, ticks):
if ((self.sc & 0x81) == 0x81):
self.cycles -= ticks
-
if (self.cycles <= 0):
self.sb = 0xFF
self.sc &= 0x7F
self.cycles = constants.SERIAL_IDLE_CLOCK
-
self.interrupt.raiseInterrupt(constants.SERIAL)
@@ -43,7 +33,6 @@
def setSerialControl(self, data):
self.sc = data
-
# HACK: delay the serial interrupt (Shin Nihon Pro Wrestling)
self.cycles = constants.SERIAL_IDLE_CLOCK + constants.SERIAL_CLOCK
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/sound.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/sound.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/sound.py Thu Mar 27 00:42:04 2008
@@ -485,7 +485,7 @@
buffer[index + 0] -= self.audio2Volume
if ((self.nr51 & 0x02) != 0):
buffer[index + 1] -= self.audio2Volume
- else:
+ else:
if ((self.nr51 & 0x20) != 0):
buffer[index + 0] += self.audio2Volume
if ((self.nr51 & 0x02) != 0):
@@ -661,7 +661,7 @@
# 7 steps
self.audio4Index &= 0x7FFFFF
polynomial = self.noiseStep7Table[self.audio4Index >> 21] >> ((self.audio4Index >> 16) & 31)
- else:
+ else:
# 15 steps
self.audio4Index &= 0x7FFFFFFF
polynomial = self.noiseStep15Table[self.audio4Index >> 21] >> ((self.audio4Index >> 16) & 31)
@@ -670,7 +670,7 @@
buffer[index + 0] -= self.audio4Volume
if ((self.nr51 & 0x08) != 0):
buffer[index + 1] -= self.audio4Volume
- else:
+ else:
if ((self.nr51 & 0x80) != 0):
buffer[index + 0] += self.audio4Volume
if ((self.nr51 & 0x08) != 0):
@@ -703,7 +703,6 @@
if ((self.nr52 & 0x80) == 0x00):
self.nr52 &= 0xF0
-
# Frequency Table Generation
def generateFrequencyTables(self):
sampleRate = self.driver.getSampleRate()
@@ -715,7 +714,6 @@
else:
self.frequencyTable[period] = skip
# Polynomial Noise Frequency Ratios
- #
# 4194304 Hz * 1/2^3 * 2 4194304 Hz * 1/2^3 * 1 4194304 Hz * 1/2^3 *
# 1/2 4194304 Hz * 1/2^3 * 1/3 4194304 Hz * 1/2^3 * 1/4 4194304 Hz *
# 1/2^3 * 1/5 4194304 Hz * 1/2^3 * 1/6 4194304 Hz * 1/2^3 * 1/7
@@ -725,8 +723,6 @@
divider = 2 * ratio
self.noiseFreqRatioTable[ratio] = (constants.GAMEBOY_CLOCK / divider) * ((1 << 16) / sampleRate)
-
-
# Noise Generation
def generateNoiseTables(self):
polynomial = 0x7F
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_cpu.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_cpu.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_cpu.py Thu Mar 27 00:42:04 2008
@@ -229,7 +229,11 @@
assert cpu.isZ() == True
cpu.rom[0x1234] = 0x12
assert cpu.isZ() == True
-
+
+
+def fetch_execute_cycle_test(cpu, opCode, cycles=0):
+ prepare_for_fetch(cpu, opCode)
+ cycle_test(cpu, 0xCB, cycles)
def cycle_test(cpu, opCode, cycles=0):
startCycles = cpu.cycles
@@ -1105,16 +1109,16 @@
pass
# push_BC to push_AF
-def test_0xC5():
- py.test.skip("changements to the cpu class")
+def test_0xC5_to_0xF5():
cpu = get_cpu()
registers = [cpu.bc, cpu.de, cpu.hl, cpu.af]
- opCode = 0xC4
+ opCode = 0xC5
value = 0x1234
for register in registers:
+ register.set(value)
cycle_test(cpu, opCode, 4)
- assert cpu.memory.read(cpu.sp.get()) == value >> 8
- assert cpu.memory.read(cpu.sp.get()-1) == value & 0xFF
+ assert cpu.memory.read(cpu.sp.get()+1) == value >> 8
+ assert cpu.memory.read(cpu.sp.get()) == value & 0xFF
opCode += 0x10
value += 0x0101
@@ -1177,11 +1181,22 @@
# rlc_B to rlc_A
def test_0x00_to_0x07():
+ py.test.skip("Bug in cpu")
cpu = get_cpu()
registers = [cpu.b, cpu.c, cpu.d, cpu.e, cpu.h, cpu.l, cpu.hli, cpu.a]
opCode = 0x00
+ value = 0x12
for register in registers:
+ cpu.reset()
+ register.set(value)
+ cycles = 2
+ if register == cpu.hli:
+ cycles = 4
+ fetch_execute_cycle_test(cpu, opCode, cycles)
+ rlc = ((value & 0x7F) << 1) + ((value & 0x80) >> 7)
+ assert register.get() == rcl
opCode += 0x01
+ vaue += 1
# rrc_B to rrc_F
def test_0x08_to_0x0F():
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_interrupt.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_interrupt.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/test/test_interrupt.py Thu Mar 27 00:42:04 2008
@@ -0,0 +1,47 @@
+
+from pypy.lang.gameboy.interrupt import *
+from pypy.lang.gameboy import constants
+
+def get_interrupt():
+ return Interrupt()
+
+
+
+def test_rest():
+ interrupt = get_interrupt()
+ assert interrupt.enable == 0
+ assert interrupt.flag == constants.VBLANK
+ interrupt.enable = 1
+ interrupt.flag = ~constants.VBLANK
+ interrupt.reset()
+ assert interrupt.enable == 0
+ assert interrupt.flag == constants.VBLANK
+
+
+def test_is_pending():
+ interrupt = get_interrupt()
+ assert interrupt.isPending() == False
+ assert interrupt.isPending(0x00) == False
+ interrupt.setInterruptEnable(True)
+ assert interrupt.isPending() == True
+
+
+def test_raise_interrupt():
+ interrupt = get_interrupt()
+
+def test_lower():
+ interrupt = get_interrupt()
+
+def test_write():
+ interrupt = get_interrupt()
+
+def test_read():
+ interrupt = get_interrupt()
+
+def test_interrupt_enable():
+ interrupt = get_interrupt()
+
+
+def test_interrupt_flag():
+ interrupt = get_interrupt()
+
\ No newline at end of file
Modified: pypy/branch/gameboy-emulator/pypy/lang/gameboy/timer.py
==============================================================================
--- pypy/branch/gameboy-emulator/pypy/lang/gameboy/timer.py (original)
+++ pypy/branch/gameboy-emulator/pypy/lang/gameboy/timer.py Thu Mar 27 00:42:04 2008
@@ -11,14 +11,12 @@
self.interrupt = interrupt
self.reset()
-
def reset(self):
self.div = 0
self.dividerCycles = constants.DIV_CLOCK
self.tima = self.tma = self.tac = 0x00
self.timerCycles = self.timerClock = constants.TIMER_CLOCK[self.tac & 0x03]
-
def write(self, address, data):
if address==constants.DIV:
self.setDivider(data)
@@ -29,8 +27,6 @@
elif address==constants.TAC:
self.setTimerControl(data)
-
-
def read(self, address):
if address==constants.DIV:
return self.getDivider()
@@ -68,34 +64,27 @@
self.timerCycles = self.timerClock = constants.TIMER_CLOCK[data & 0x03]
self.tac = data
-
def cycles(self):
if ((self.tac & 0x04) != 0 and self.timerCycles < self.dividerCycles):
return self.timerCycles
return self.dividerCycles
-
def emulate(self, ticks):
self.emulateDivider(ticks)
self.emulateTimer(ticks)
-
def emulateDivider(self, ticks):
self.dividerCycles -= ticks
while (self.dividerCycles <= 0):
self.div = (self.div + 1) & 0xFF
self.dividerCycles += constants.DIV_CLOCK
-
-
def emulateTimer(self, ticks):
if ((self.tac & 0x04) != 0):
self.timerCycles -= ticks
-
while (self.timerCycles <= 0):
self.tima = (self.tima + 1) & 0xFF
self.timerCycles += self.timerClock
-
if (self.tima == 0x00):
self.tima = self.tma
self.interrupt.raiseInterrupt(constants.TIMER)
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