Thread safetyness in Python
Duncan Grisby
duncan-news at grisby.org
Wed Jul 3 12:02:18 EDT 2002
In article <mailman.1025707575.7026.python-list at python.org>,
Jeff Epler <jepler at unpythonic.net> wrote:
>On Wed, Jul 03, 2002 at 02:12:39PM +0000, Gerhard Haering wrote:
>> John Goerzen wrote:
>> > 1. In C, a++ would be atomic because CPUs have an atomic increment
>> > operation, in most cases.
>>
>> What about SMP systems?
>
>Being one instruction is not enough to be atomic in SMP systems. For
Even if the architecture had a reliable atomic increment instruction,
there's no guarantee that the compiler would use it. It's entirely
likely that the optimiser would generate code to do the increment in a
register, and write it back to memory much later.
None of this is relevant to Python, of course...
Cheers,
Duncan.
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-- Duncan Grisby --
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