[pypy-commit] pypy default: simplify the logic

[cfbolz]

Author: Carl Friedrich Bolz <cfbolz at gmx.de>
Branch: 
Changeset: r92181:f59f82d01a6d
Date: 2017-08-20 19:04 +0200
http://bitbucket.org/pypy/pypy/changeset/f59f82d01a6d/

Log:	simplify the logic

diff --git a/rpython/jit/backend/llsupport/regalloc.py b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -552,10 +552,11 @@
             self.reg_bindings[result_v] = loc
             return loc
         if v not in self.reg_bindings:
+            # v not in a register. allocate one for result_v and move v there
             prev_loc = self.frame_manager.loc(v)
-            loc = self.force_allocate_reg(v, forbidden_vars)
+            loc = self.force_allocate_reg(result_v, forbidden_vars)
             self.assembler.regalloc_mov(prev_loc, loc)
-        assert v in self.reg_bindings
+            return loc
         if self.longevity[v][1] > self.position:
             # we need to find a new place for variable v and
             # store result in the same place