[pypy-commit] pypy z196-support: removed not used RISBGN instruction and reverted the target CPU arch to z196. Ideally this should be a translation flag

[plan_rich]

Author: Richard Plangger <planrichi at gmail.com>
Branch: z196-support
Changeset: r84397:f9c522b8828b
Date: 2016-05-12 10:06 +0200
http://bitbucket.org/pypy/pypy/changeset/f9c522b8828b/

Log:	removed not used RISBGN instruction and reverted the target CPU arch
	to z196. Ideally this should be a translation flag

diff --git a/rpython/jit/backend/zarch/instructions.py b/rpython/jit/backend/zarch/instructions.py
--- a/rpython/jit/backend/zarch/instructions.py
+++ b/rpython/jit/backend/zarch/instructions.py
@@ -44,7 +44,6 @@
 
     # rotating
     'RISBG':   ('rie_f',   ['\xEC','\x55']),
-    'RISBGN':  ('rie_f',   ['\xEC','\x59']),
 
     # invert & negative & absolute
     'LPGR':    ('rre',   ['\xB9','\x00']),
diff --git a/rpython/jit/backend/zarch/test/test_assembler.py b/rpython/jit/backend/zarch/test/test_assembler.py
--- a/rpython/jit/backend/zarch/test/test_assembler.py
+++ b/rpython/jit/backend/zarch/test/test_assembler.py
@@ -189,7 +189,7 @@
     @py.test.mark.parametrize('p', [2**32,2**32+1,2**63-1,2**63-2,0,1,2,3,4,5,6,7,8,10001])
     def test_align_withroll(self, p):
         self.a.mc.load_imm(r.r2, p & 0xffffFFFFffffFFFF)
-        self.a.mc.RISBGN(r.r2, r.r2, loc.imm(0), loc.imm(0x80 | 60), loc.imm(0))
+        self.a.mc.RISBG(r.r2, r.r2, loc.imm(0), loc.imm(0x80 | 60), loc.imm(0))
         self.a.mc.BCR(con.ANY, r.r14)
         assert run_asm(self.a) == rffi.cast(rffi.ULONG,p) & ~(7)
 
@@ -214,7 +214,7 @@
         n = 13
         l = loc
         self.a.mc.load_imm(r.r2, 7<<n)
-        self.a.mc.RISBGN(r.r2, r.r2, l.imm(61), l.imm(0x80 | 63), l.imm(64-n))
+        self.a.mc.RISBG(r.r2, r.r2, l.imm(61), l.imm(0x80 | 63), l.imm(64-n))
         self.a.mc.BCR(con.ANY, r.r14)
         assert run_asm(self.a) == 7
 
@@ -222,7 +222,7 @@
         n = 16
         l = loc
         self.a.mc.load_imm(r.r2, 0xffFFffFF)
-        self.a.mc.RISBGN(r.r2, r.r2, l.imm(60), l.imm(0x80 | 63), l.imm(64-n))
+        self.a.mc.RISBG(r.r2, r.r2, l.imm(60), l.imm(0x80 | 63), l.imm(64-n))
         self.a.mc.BCR(con.ANY, r.r14)
         assert run_asm(self.a) == 15
 
diff --git a/rpython/jit/backend/zarch/test/test_auto_encoding.py b/rpython/jit/backend/zarch/test/test_auto_encoding.py
--- a/rpython/jit/backend/zarch/test/test_auto_encoding.py
+++ b/rpython/jit/backend/zarch/test/test_auto_encoding.py
@@ -204,7 +204,7 @@
                 g.write('%s\n' % op)
                 oplist.append(op)
             g.write('\t.string "%s"\n' % END_TAG)
-        proc = subprocess.Popen(['as', '-m64', '-mzarch', '-march=zEC12',
+        proc = subprocess.Popen(['as', '-m64', '-mzarch', '-march=z196',
                                  inputname, '-o', filename],
                                 stdout=subprocess.PIPE,
                                 stderr=subprocess.PIPE)
diff --git a/rpython/translator/platform/linux.py b/rpython/translator/platform/linux.py
--- a/rpython/translator/platform/linux.py
+++ b/rpython/translator/platform/linux.py
@@ -23,7 +23,7 @@
 
     if platform.machine() == 's390x':
         # force the right target arch for s390x
-        cflags = ('-march=zEC12','-m64','-mzarch') + cflags
+        cflags = ('-march=z196','-m64','-mzarch') + cflags
 
     def _args_for_shared(self, args):
         return ['-shared'] + args