[pypy-commit] pypy s390x-backend: float comparison operations passing int_float_operations tests (unary ops missing)
plan_rich
noreply at buildbot.pypy.org
Fri Nov 20 08:55:46 EST 2015
Author: Richard Plangger <planrichi at gmail.com>
Branch: s390x-backend
Changeset: r80792:0f8f161d153e
Date: 2015-11-20 14:56 +0100
http://bitbucket.org/pypy/pypy/changeset/0f8f161d153e/
Log: float comparison operations passing int_float_operations tests
(unary ops missing)
diff --git a/rpython/jit/backend/zarch/codebuilder.py b/rpython/jit/backend/zarch/codebuilder.py
--- a/rpython/jit/backend/zarch/codebuilder.py
+++ b/rpython/jit/backend/zarch/codebuilder.py
@@ -120,8 +120,10 @@
def cmp_op(self, a, b, pool=False, imm=False, signed=True, fp=False):
if fp == True:
- xxx
- self.fcmpu(a, b)
+ if pool:
+ self.CDB(a, b)
+ else:
+ self.CDBR(a, b)
else:
if signed:
if pool:
diff --git a/rpython/jit/backend/zarch/helper/assembler.py b/rpython/jit/backend/zarch/helper/assembler.py
--- a/rpython/jit/backend/zarch/helper/assembler.py
+++ b/rpython/jit/backend/zarch/helper/assembler.py
@@ -14,18 +14,20 @@
self.mc.cmp_op(l0, l1, pool=l1.is_in_pool(), imm=l1.is_imm(), signed=signed, fp=fp)
if fp:
- xxx
# Support for NaNs: with LE or GE, if one of the operands is a
# NaN, we get CR=1,0,0,0 (unordered bit only). We're about to
# check "not GT" or "not LT", but in case of NaN we want to
# get the answer False.
- #if condition == c.LE:
- # self.mc.crnor(1, 1, 3)
- # condition = c.GT
- #elif condition == c.GE:
- # self.mc.crnor(0, 0, 3)
- # condition = c.LT
- pass
+ if condition == c.LE:
+ pass
+ # TODO xxx
+ #self.mc.crnor(1, 1, 3)
+ #condition = c.GT
+ elif condition == c.GE:
+ pass
+ #xxx
+ #self.mc.crnor(0, 0, 3)
+ #condition = c.LT
self.flush_cc(condition, arglocs[2])
diff --git a/rpython/jit/backend/zarch/helper/regalloc.py b/rpython/jit/backend/zarch/helper/regalloc.py
--- a/rpython/jit/backend/zarch/helper/regalloc.py
+++ b/rpython/jit/backend/zarch/helper/regalloc.py
@@ -143,6 +143,13 @@
return [l0, l1, res, invert]
return prepare_cmp_op
+def prepare_float_cmp_op(self, op):
+ l0 = self.ensure_reg(op.getarg(0), force_in_reg=True)
+ l1 = self.ensure_reg(op.getarg(1))
+ res = self.force_allocate_reg_or_cc(op)
+ self.free_op_vars()
+ return [l0, l1, res]
+
def prepare_binary_op(self, op):
a0 = op.getarg(0)
a1 = op.getarg(1)
diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -178,6 +178,13 @@
emit_float_mul = gen_emit_rr_or_rpool('MDBR','MDB')
emit_float_truediv = gen_emit_rr_or_rpool('DDBR','DDB')
+ emit_float_lt = gen_emit_cmp_op(c.LT, fp=True)
+ emit_float_le = gen_emit_cmp_op(c.LE, fp=True)
+ emit_float_eq = gen_emit_cmp_op(c.EQ, fp=True)
+ emit_float_ne = gen_emit_cmp_op(c.NE, fp=True)
+ emit_float_gt = gen_emit_cmp_op(c.GT, fp=True)
+ emit_float_ge = gen_emit_cmp_op(c.GE, fp=True)
+
def emit_cast_float_to_int(self, op, arglocs, regalloc):
f0, r0 = arglocs
self.mc.CGDBR(r0, f0, c.FP_CUTOFF)
diff --git a/rpython/jit/backend/zarch/regalloc.py b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -78,9 +78,16 @@
offset = self.assembler.pool.get_offset(var)
return l.pool(offset, r.POOL)
- def ensure_reg(self, box):
+ def ensure_reg(self, box, force_in_reg):
if isinstance(box, Const):
- return self.place_in_pool(box)
+ poolloc = self.place_in_pool(box)
+ if force_in_reg:
+ tmp = TempVar()
+ self.temp_boxes.append(tmp)
+ reg = self.force_allocate_reg(tmp)
+ self.assembler.mc.LD(reg, poolloc)
+ return reg
+ return poolloc
else:
assert box in self.temp_boxes
loc = self.make_sure_var_in_reg(box,
@@ -119,10 +126,17 @@
#val = self.convert_to_int(c)
return l.ImmLocation(val)
- def ensure_reg(self, box):
+ def ensure_reg(self, box, force_in_reg):
if isinstance(box, Const):
offset = self.assembler.pool.get_descr_offset(box)
- return l.pool(offset)
+ poolloc = l.pool(offset)
+ if force_in_reg:
+ tmp = TempVar()
+ self.temp_boxes.append(tmp)
+ reg = self.force_allocate_reg(tmp)
+ self.assembler.mc.LG(reg, poolloc)
+ return reg
+ return poolloc
else:
assert box in self.temp_boxes
loc = self.make_sure_var_in_reg(box,
@@ -546,11 +560,11 @@
else:
return self.rm.call_result_location(v)
- def ensure_reg(self, box):
+ def ensure_reg(self, box, force_in_reg=False):
if box.type == FLOAT:
- return self.fprm.ensure_reg(box)
+ return self.fprm.ensure_reg(box, force_in_reg)
else:
- return self.rm.ensure_reg(box)
+ return self.rm.ensure_reg(box, force_in_reg)
def ensure_reg_or_16bit_imm(self, box):
if box.type == FLOAT:
@@ -675,6 +689,13 @@
prepare_float_mul = helper.generate_prepare_float_binary_op(allow_swap=True)
prepare_float_truediv = helper.generate_prepare_float_binary_op()
+ prepare_float_lt = helper.prepare_float_cmp_op
+ prepare_float_le = helper.prepare_float_cmp_op
+ prepare_float_eq = helper.prepare_float_cmp_op
+ prepare_float_ne = helper.prepare_float_cmp_op
+ prepare_float_gt = helper.prepare_float_cmp_op
+ prepare_float_ge = helper.prepare_float_cmp_op
+
prepare_cast_ptr_to_int = helper.prepare_same_as
prepare_cast_int_to_ptr = helper.prepare_same_as
More information about the pypy-commit
mailing list