[pypy-commit] pypy s390x-backend: finished memcpy call, adding stack frame to the routine correctly

[plan_rich]

Author: Richard Plangger <planrichi at gmail.com>
Branch: s390x-backend
Changeset: r81436:024661e7ca0b
Date: 2015-12-23 11:50 +0100
http://bitbucket.org/pypy/pypy/changeset/024661e7ca0b/

Log:	finished memcpy call, adding stack frame to the routine correctly

diff --git a/rpython/jit/backend/zarch/codebuilder.py b/rpython/jit/backend/zarch/codebuilder.py
--- a/rpython/jit/backend/zarch/codebuilder.py
+++ b/rpython/jit/backend/zarch/codebuilder.py
@@ -1,6 +1,7 @@
 from rpython.jit.backend.zarch import conditions as c
 from rpython.jit.backend.zarch import registers as r
 from rpython.jit.backend.zarch import locations as l
+from rpython.jit.backend.zarch.arch import STD_FRAME_SIZE_IN_BYTES
 from rpython.jit.backend.zarch.instruction_builder import build_instr_codes
 from rpython.jit.backend.llsupport.asmmemmgr import BlockBuilderMixin
 from rpython.jit.backend.llsupport.assembler import GuardToken
@@ -186,6 +187,13 @@
         """
         self.BASR(r.RETURN, call_reg)
 
+    def alloc_std_frame(self):
+        self.STG(r.SP, l.addr(-STD_FRAME_SIZE_IN_BYTES, r.SP))
+        self.AGHI(r.SP, l.imm(-STD_FRAME_SIZE_IN_BYTES))
+
+    def restore_std_frame(self):
+        self.AGHI(r.SP, l.imm(STD_FRAME_SIZE_IN_BYTES))
+
 class OverwritingBuilder(BlockBuilderMixin, AbstractZARCHBuilder):
     def __init__(self, mc, start, num_insts=0):
         AbstractZARCHBuilder.__init__(self)
diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -849,10 +849,10 @@
                 self.mc.load_imm(dst, value)
                 self.mc.AGR(dst, src_ptr)
         elif scale == 0:
-            self.mc.AGR(dst, src_ptr)
+            self.mc.LGR(dst, src_ptr)
             self.mc.AGR(dst, src_ofs)
         else:
-            self.mc.SLAG(dst, src_ofs, l.add(scale))
+            self.mc.SLAG(dst, src_ofs, l.addr(scale))
             self.mc.AGR(dst, src_ptr)
 
     def _emit_copycontent(self, arglocs, is_unicode):
@@ -879,16 +879,18 @@
             self.mc.load_imm(r.r4, length << scale)
         else:
             if scale > 0:
-                self.mc.sldi(r.r4.value, length_loc.value, scale)
-            elif length_loc is not r.r5:
+                self.mc.SLAG(r.r4, length_loc, l.addr(scale))
+            elif length_loc is not r.r4:
                 self.mc.LGR(r.r4, length_loc)
 
         self.mc.LGR(r.r3, r.r0)
         self.mc.AGHI(r.r3, l.imm(basesize))
         self.mc.AGHI(r.r2, l.imm(basesize))
 
+        self.mc.alloc_std_frame()
         self.mc.load_imm(self.mc.RAW_CALL_REG, self.memcpy_addr)
         self.mc.raw_call()
+        self.mc.restore_std_frame()
 
 
 class ForceOpAssembler(object):
diff --git a/rpython/jit/backend/zarch/regalloc.py b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -1010,8 +1010,8 @@
         return locs
 
     def prepare_copystrcontent(self, op):
-        src_ptr_loc = self.ensure_reg(op.getarg(0))
-        dst_ptr_loc = self.ensure_reg(op.getarg(1))
+        src_ptr_loc = self.ensure_reg(op.getarg(0), force_in_reg=True)
+        dst_ptr_loc = self.ensure_reg(op.getarg(1), force_in_reg=True)
         src_ofs_loc = self.ensure_reg_or_any_imm(op.getarg(2))
         dst_ofs_loc = self.ensure_reg_or_any_imm(op.getarg(3))
         length_loc  = self.ensure_reg_or_any_imm(op.getarg(4))