[pypy-commit] pypy memoryerror: reverted some changes to get to the root of the problem

[plan_rich]

Author: Richard Plangger <rich at pasra.at>
Branch: memoryerror
Changeset: r79179:a2ed66c15857
Date: 2015-08-24 10:27 +0200
http://bitbucket.org/pypy/pypy/changeset/a2ed66c15857/

Log:	reverted some changes to get to the root of the problem

diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -536,7 +536,7 @@
             self.cpu.profile_agent.native_code_written(name,
                                                        rawstart, full_size)
         return AsmInfo(ops_offset, rawstart + looppos,
-                       size_excluding_failure_stuff - looppos, rawstart)
+                       size_excluding_failure_stuff - looppos)
 
     @rgc.no_release_gil
     def assemble_bridge(self, faildescr, inputargs, operations,
@@ -589,11 +589,12 @@
             name = "Bridge # %s" % (descr_number,)
             self.cpu.profile_agent.native_code_written(name,
                                                        rawstart, fullsize)
-        return AsmInfo(ops_offset, startpos + rawstart, codeendpos - startpos, rawstart)
+        return AsmInfo(ops_offset, startpos + rawstart, codeendpos - startpos)
 
     def stitch_bridge(self, faildescr, target):
-        assert target.rawstart != 0
-        self.patch_jump_for_descr(faildescr, target.rawstart)
+        if target is not None:
+            assert target.rawstart != 0
+            self.patch_jump_for_descr(faildescr, target.rawstart)
 
     def write_pending_failure_recoveries(self, regalloc):
         # for each pending guard, generate the code of the recovery stub
diff --git a/rpython/jit/metainterp/compile.py b/rpython/jit/metainterp/compile.py
--- a/rpython/jit/metainterp/compile.py
+++ b/rpython/jit/metainterp/compile.py
@@ -204,26 +204,27 @@
             vl.inputargs = version.inputargs
             vl.operations = version.operations
             vl.original_jitcell_token = jitcell_token
-            asminfo = send_bridge_to_backend(jitdriver_sd, metainterp_sd,
+            send_bridge_to_backend(jitdriver_sd, metainterp_sd,
                                    faildescr, version.inputargs,
                                    version.operations, jitcell_token)
             record_loop_or_bridge(metainterp_sd, vl)
-            assert asminfo is not None
-            version._compiled = asminfo
-            faildescr.version = None
+            #assert asminfo is not None
+            #version._compiled = asminfo
+            #faildescr.version = None
+        loop.versions = None
         # stitch the rest of the traces
-        for lv in loop.versions:
-            if not lv.compiled():
-                # the version was never compiled, do not bother
-                # to assign it's fail descr
-                continue
-            for faildescr in lv.faildescrs:
-                assert isinstance(faildescr, CompileLoopVersionDescr)
-                version = faildescr.version
-                if version and version.compiled():
-                    cpu.stitch_bridge(faildescr, version._compiled)
-                faildescr.version = None
-    loop.versions = None
+        #for lv in loop.versions:
+        #    if not lv.compiled():
+        #        # the version was never compiled, do not bother
+        #        # to assign it's fail descr
+        #        continue
+        #    for faildescr in lv.faildescrs:
+        #        assert isinstance(faildescr, CompileLoopVersionDescr)
+        #        version = faildescr.version
+        #        if version and version.compiled():
+        #            cpu.stitch_bridge(faildescr, version._compiled)
+        #        faildescr.version = None
+    #loop.versions = None
 
 def compile_retrace(metainterp, greenkey, start,
                     inputargs, jumpargs,
@@ -454,7 +455,7 @@
     #if metainterp_sd.warmrunnerdesc is not None:    # for tests
     #    metainterp_sd.warmrunnerdesc.memory_manager.keep_loop_alive(
     #        original_loop_token)
-    return asminfo
+    #return asminfo
 
 # ____________________________________________________________
 
diff --git a/rpython/jit/metainterp/history.py b/rpython/jit/metainterp/history.py
--- a/rpython/jit/metainterp/history.py
+++ b/rpython/jit/metainterp/history.py
@@ -809,6 +809,8 @@
         assert version.renamed_inputargs is not None
 
     def update_token(self, jitcell_token, all_target_tokens):
+        if self.compiled():
+            return
         # this is only invoked for versioned loops!
         label_index = index_of_first(rop.LABEL, self.operations, 0)
         label = self.operations[label_index]
diff --git a/rpython/jit/metainterp/logger.py b/rpython/jit/metainterp/logger.py
--- a/rpython/jit/metainterp/logger.py
+++ b/rpython/jit/metainterp/logger.py
@@ -102,7 +102,6 @@
         return descr.repr_of_descr()
 
     def repr_of_arg(self, arg):
-        return str(arg) # XXX
         try:
             mv = self.memo[arg]
         except KeyError:
diff --git a/rpython/jit/metainterp/optimizeopt/guard.py b/rpython/jit/metainterp/optimizeopt/guard.py
--- a/rpython/jit/metainterp/optimizeopt/guard.py
+++ b/rpython/jit/metainterp/optimizeopt/guard.py
@@ -277,9 +277,9 @@
                 if descr.loop_version():
                     root_version.register_guard(op, version)
 
-            if user_code:
-                version = loop.snapshot()
-                self.eliminate_array_bound_checks(loop, root_version, version)
+            #if user_code:
+            #    version = loop.snapshot()
+            #    self.eliminate_array_bound_checks(loop, root_version, version)
 
     def emit_operation(self, op):
         self.renamer.rename(op)
diff --git a/rpython/rlib/jit.py b/rpython/rlib/jit.py
--- a/rpython/rlib/jit.py
+++ b/rpython/rlib/jit.py
@@ -1006,11 +1006,10 @@
     asmlen - assembler block length
     rawstart - address a guard can jump to
     """
-    def __init__(self, ops_offset, asmaddr, asmlen, rawstart):
+    def __init__(self, ops_offset, asmaddr, asmlen):
         self.ops_offset = ops_offset
         self.asmaddr = asmaddr
         self.asmlen = asmlen
-        self.rawstart = rawstart
 
 class JitDebugInfo(object):
     """ An object representing debug info. Attributes meanings: