[pypy-commit] pypy arm-longlong: uh, there are synonyms in the ARM instruction set?

arigo noreply at buildbot.pypy.org
Mon Sep 1 09:50:26 CEST 2014


Author: Armin Rigo <arigo at tunes.org>
Branch: arm-longlong
Changeset: r73261:d6eaca4efd43
Date: 2014-09-01 09:49 +0200
http://bitbucket.org/pypy/pypy/changeset/d6eaca4efd43/

Log:	uh, there are synonyms in the ARM instruction set?

diff --git a/rpython/jit/backend/arm/codebuilder.py b/rpython/jit/backend/arm/codebuilder.py
--- a/rpython/jit/backend/arm/codebuilder.py
+++ b/rpython/jit/backend/arm/codebuilder.py
@@ -340,19 +340,8 @@
     MOD = binary_helper_call('int_mod')
     UDIV = binary_helper_call('uint_div')
 
-    def FMDRR(self, dm, rd, rn, c=cond.AL):
-        self.write32(c << 28
-                    | 0x0c400b10
-                    | (dm & 0xF)
-                    | (rd & 0xF) << 12
-                    | (rn & 0xF) << 16)
-
-    def FMRRD(self, rd, rn, dm, c=cond.AL):
-        self.write32(c << 28
-                    | 0x0c500b10
-                    | (dm & 0xF)
-                    | (rd & 0xF) << 12
-                    | (rn & 0xF) << 16)
+    FMDRR = VMOV_cr     # uh, there are synonyms?
+    FMRRD = VMOV_rc
 
     def _encode_reg_list(self, instr, regs):
         for reg in regs:


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