[pypy-commit] pypy default: Test and fix for issue #1632.

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: 
Changeset: r67891:a3af3cc958c5
Date: 2013-11-09 11:27 +0100
http://bitbucket.org/pypy/pypy/changeset/a3af3cc958c5/

Log:	Test and fix for issue #1632.

diff --git a/rpython/jit/backend/x86/callbuilder.py b/rpython/jit/backend/x86/callbuilder.py
--- a/rpython/jit/backend/x86/callbuilder.py
+++ b/rpython/jit/backend/x86/callbuilder.py
@@ -304,8 +304,12 @@
         except IndexError:
             return None
         if hint in self.DONT_MOVE_GPR:
-            self.ARGUMENTS_GPR[i] = hint
-            res = hint
+            for j in range(i):
+                if hint is self.ARGUMENTS_GPR[j]:
+                    break
+            else:
+                self.ARGUMENTS_GPR[i] = hint
+                res = hint
         return res
 
     def _unused_xmm(self):
diff --git a/rpython/jit/backend/x86/test/test_callbuilder.py b/rpython/jit/backend/x86/test/test_callbuilder.py
new file mode 100644
--- /dev/null
+++ b/rpython/jit/backend/x86/test/test_callbuilder.py
@@ -0,0 +1,33 @@
+from rpython.jit.backend.x86 import callbuilder
+from rpython.jit.backend.x86.regloc import esi, edi, ebx, ecx, ImmedLoc
+
+
+class FakeAssembler:
+    mc = None
+    class _regalloc:
+        class rm:
+            free_regs = [ebx]
+
+    def __init__(self):
+        self._log = []
+
+    def _is_asmgcc(self):
+        return False
+
+    def regalloc_mov(self, src, dst):
+        self._log.append(('mov', src, dst))
+
+
+def test_base_case():
+    asm = FakeAssembler()
+    cb = callbuilder.CallBuilder64(asm, ImmedLoc(12345), [ebx, ebx])
+    cb.prepare_arguments()
+    assert asm._log == [('mov', ebx, edi),
+                        ('mov', ebx, esi)]
+
+def test_bug_call_release_gil():
+    asm = FakeAssembler()
+    cb = callbuilder.CallBuilder64(asm, ImmedLoc(12345), [ebx, ebx])
+    cb.select_call_release_gil_mode()
+    cb.prepare_arguments()
+    assert asm._log == [('mov', ebx, ecx)]