[pypy-commit] pypy fast-slowpath: x86-32: don't put anything in the stack before esp, because these locations may be overritten randomly

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: fast-slowpath
Changeset: r65735:3360d9f154d9
Date: 2013-07-28 12:56 +0200
http://bitbucket.org/pypy/pypy/changeset/3360d9f154d9/

Log:	x86-32: don't put anything in the stack before esp, because these
	locations may be overritten randomly

diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -14,7 +14,7 @@
 from rpython.rlib.jit import AsmInfo
 from rpython.jit.backend.model import CompiledLoopToken
 from rpython.jit.backend.x86.regalloc import (RegAlloc, get_ebp_ofs,
-    gpr_reg_mgr_cls, xmm_reg_mgr_cls)
+    gpr_reg_mgr_cls, xmm_reg_mgr_cls, _register_arguments)
 from rpython.jit.backend.llsupport.regalloc import (get_scale, valid_addressing_size)
 from rpython.jit.backend.x86.arch import (FRAME_FIXED_SIZE, WORD, IS_X86_64,
                                        JITFRAME_FIXED_SIZE, IS_X86_32,
@@ -163,7 +163,8 @@
             # the caller is responsible for putting arguments in the right spot
             mc.SUB(esp, imm(WORD * 7))
             self.set_extra_stack_depth(mc, 8 * WORD)
-            # args are in their respective positions
+            for i in range(4):
+                mc.MOV_sr(i * WORD, _register_arguments[i].value)
         mc.CALL(eax)
         if IS_X86_64:
             mc.ADD(esp, imm(WORD))
@@ -2160,7 +2161,7 @@
     def label(self):
         self._check_frame_depth_debug(self.mc)
 
-    def cond_call(self, op, gcmap, cond_loc, call_loc, arglocs):
+    def cond_call(self, op, gcmap, cond_loc, call_loc):
         self.mc.TEST(cond_loc, cond_loc)
         self.mc.J_il8(rx86.Conditions['Z'], 0) # patched later
         jmp_adr = self.mc.get_relative_pos()
@@ -2176,11 +2177,6 @@
             if self._regalloc.xrm.reg_bindings:
                 floats = True
         cond_call_adr = self.cond_call_slowpath[floats * 2 + callee_only]
-        if IS_X86_32:
-            p = -8 * WORD
-            for loc in arglocs:
-                self.mc.MOV(RawEspLoc(p, INT), loc)
-                p += WORD
         self.mc.CALL(imm(cond_call_adr))
         self.pop_gcmap(self.mc)
         # never any result value
diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -56,7 +56,6 @@
 
     no_lower_byte_regs = []
     save_around_call_regs = [eax, ecx, edx, esi, edi, r8, r9, r10]
-    register_arguments = [edi, esi, edx, ecx]
 
 class X86XMMRegisterManager(RegisterManager):
 
@@ -120,6 +119,9 @@
 for _i, _reg in enumerate(gpr_reg_mgr_cls.all_regs):
     gpr_reg_mgr_cls.all_reg_indexes[_reg.value] = _i
 
+_register_arguments = [edi, esi, edx, ecx]
+
+
 class RegAlloc(BaseRegalloc):
 
     def __init__(self, assembler, translate_support_code=False):
@@ -809,18 +811,12 @@
         imm = self.rm.convert_to_imm(v)
         self.assembler.regalloc_mov(imm, eax)
         args_so_far = [tmpbox]
-        locs = []
         for i in range(2, len(args)):
-            if IS_X86_64:
-                reg = self.rm.register_arguments[i - 2]
-                self.make_sure_var_in_reg(args[i], args_so_far, selected_reg=reg)
-            else:
-                loc = self.make_sure_var_in_reg(args[i], args_so_far)
-                locs.append(loc)
+            reg = _register_arguments[i - 2]
+            self.make_sure_var_in_reg(args[i], args_so_far, selected_reg=reg)
             args_so_far.append(args[i])
         loc_cond = self.make_sure_var_in_reg(args[0], args)
-        self.assembler.cond_call(op, self.get_gcmap([eax]), loc_cond, eax,
-                                 locs)
+        self.assembler.cond_call(op, self.get_gcmap([eax]), loc_cond, eax)
         self.rm.possibly_free_var(tmpbox)
 
     def consider_call_malloc_nursery(self, op):