[pypy-commit] pypy jitframe-on-heap: remove unused code and update x86 backend specific pieces in test_regalloc
bivab
noreply at buildbot.pypy.org
Fri Feb 15 14:57:21 CET 2013
Author: David Schneider <david.schneider at picle.org>
Branch: jitframe-on-heap
Changeset: r61257:83a73c5daab1
Date: 2013-02-15 14:47 +0100
http://bitbucket.org/pypy/pypy/changeset/83a73c5daab1/
Log: remove unused code and update x86 backend specific pieces in
test_regalloc
diff --git a/rpython/jit/backend/x86/test/test_regalloc.py b/rpython/jit/backend/x86/test/test_regalloc.py
--- a/rpython/jit/backend/x86/test/test_regalloc.py
+++ b/rpython/jit/backend/x86/test/test_regalloc.py
@@ -8,77 +8,19 @@
from rpython.jit.metainterp.resoperation import rop, ResOperation
from rpython.jit.backend.llsupport.descr import GcCache
from rpython.jit.backend.detect_cpu import getcpuclass
-from rpython.jit.backend.x86.regalloc import RegAlloc, X86RegisterManager,\
- is_comparison_or_ovf_op
-from rpython.jit.backend.x86.arch import IS_X86_32, IS_X86_64
+from rpython.jit.backend.llsupport.regalloc import is_comparison_or_ovf_op
from rpython.jit.tool.oparser import parse
from rpython.rtyper.lltypesystem import lltype, llmemory, rffi
from rpython.rtyper.annlowlevel import llhelper
from rpython.rtyper.lltypesystem import rclass, rstr
from rpython.jit.codewriter import longlong
from rpython.jit.codewriter.effectinfo import EffectInfo
-from rpython.jit.backend.x86.rx86 import *
def test_is_comparison_or_ovf_op():
assert not is_comparison_or_ovf_op(rop.INT_ADD)
assert is_comparison_or_ovf_op(rop.INT_ADD_OVF)
assert is_comparison_or_ovf_op(rop.INT_EQ)
-CPU = getcpuclass()
-class MockGcDescr(GcCache):
- def get_funcptr_for_new(self):
- return 123
- get_funcptr_for_newarray = get_funcptr_for_new
- get_funcptr_for_newstr = get_funcptr_for_new
- get_funcptr_for_newunicode = get_funcptr_for_new
-
- def rewrite_assembler(self, cpu, operations):
- pass
-
-class MockAssembler(object):
- gcrefs = None
- _float_constants = None
-
- def __init__(self, cpu=None, gc_ll_descr=None):
- self.movs = []
- self.performs = []
- self.lea = []
- if cpu is None:
- cpu = CPU(None, None)
- cpu.setup_once()
- self.cpu = cpu
- if gc_ll_descr is None:
- gc_ll_descr = MockGcDescr(False)
- self.cpu.gc_ll_descr = gc_ll_descr
-
- def dump(self, *args):
- pass
-
- def regalloc_mov(self, from_loc, to_loc):
- self.movs.append((from_loc, to_loc))
-
- def regalloc_perform(self, op, arglocs, resloc):
- self.performs.append((op, arglocs, resloc))
-
- def regalloc_perform_discard(self, op, arglocs):
- self.performs.append((op, arglocs))
-
- def load_effective_addr(self, *args):
- self.lea.append(args)
-
-def fill_regs(regalloc, cls=BoxInt):
- allboxes = []
- for reg in X86RegisterManager.all_regs:
- box = cls()
- allboxes.append(box)
- regalloc.rm.try_allocate_reg()
- return allboxes
-
-class RegAllocForTests(RegAlloc):
- position = 0
- def _compute_next_usage(self, v, _):
- return -1
-
def get_zero_division_error(self):
# for tests, a random emulated ll_inst will do
@@ -91,6 +33,7 @@
return zer_vtable, zer_inst
+CPU = getcpuclass()
class BaseTestRegalloc(object):
cpu = CPU(None, None)
cpu.setup_once()
@@ -172,7 +115,7 @@
def prepare_loop(self, ops):
loop = self.parse(ops)
- regalloc = RegAlloc(self.cpu.assembler, False)
+ regalloc = self.cpu.build_regalloc()
regalloc.prepare_loop(loop.inputargs, loop.operations,
loop.original_jitcell_token, [])
return regalloc
@@ -630,10 +573,10 @@
def expected_frame_depth(self, num_call_args, num_pushed_input_args=0):
# Assumes the arguments are all non-float
- if IS_X86_32:
+ if not self.cpu.IS_64_BIT:
extra_esp = num_call_args
return extra_esp
- elif IS_X86_64:
+ elif self.cpu.IS_64_BIT:
# 'num_pushed_input_args' is for X86_64 only
extra_esp = max(num_call_args - 6, 0)
return num_pushed_input_args + extra_esp
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