[pypy-commit] pypy jitframe-on-heap: fp register now points to the start of the JITFRAME

bivab noreply at buildbot.pypy.org
Wed Feb 6 17:50:16 CET 2013


Author: David Schneider <david.schneider at picle.org>
Branch: jitframe-on-heap
Changeset: r60909:a31d38ea0ff3
Date: 2013-02-06 17:37 +0100
http://bitbucket.org/pypy/pypy/changeset/a31d38ea0ff3/

Log:	fp register now points to the start of the JITFRAME

diff --git a/rpython/jit/backend/arm/assembler.py b/rpython/jit/backend/arm/assembler.py
--- a/rpython/jit/backend/arm/assembler.py
+++ b/rpython/jit/backend/arm/assembler.py
@@ -231,6 +231,7 @@
         ofs = self.cpu.get_ofs_of_frame_field('jf_descr')
         # make sure ofs fits into a register
         assert check_imm_arg(ofs)
+        self.mc.MOV_rr(r.r0.value, r.fp.value)
         self.mc.BKPT()
         #base_ofs = self.cpu.get_baseofs_of_frame_field()
         #self.mc.MOV_bi(ofs, propagate_exception_descr)
@@ -377,15 +378,16 @@
 
     def _push_all_regs_to_jitframe(self, mc, ignored_regs, withfloats,
                                 callee_only=False):
+        base_ofs = self.cpu.get_baseofs_of_frame_field()
         if callee_only:
             regs = CoreRegisterManager.save_around_call_regs
         else:
             regs = CoreRegisterManager.all_regs
-        # use STMDB ops here
+        # XXX use STMDB ops here
         for i, gpr in enumerate(regs):
             if gpr in ignored_regs:
                 continue
-            mc.STR_ri(gpr.value, r.fp.value, i * WORD)
+            self.store_reg(mc, gpr, r.fp, base_ofs + i * WORD)
         if withfloats:
             if callee_only:
                 regs = VFPRegisterManager.save_around_call_regs
@@ -394,8 +396,36 @@
             for i, vfpr in enumerate(regs):
                 if vfpr in ignored_regs:
                     continue
-                # add the offset of the gpr_regs
-                mc.VSTR(vfpr.value, r.fp.value, imm=i * DOUBLE_WORD)
+                ofs = len(CoreRegisterManager.all_regs) * WORD
+                ofs += i * DOUBLE_WORD + base_ofs
+                self.store_reg(mc, vfpr, r.fp, ofs)
+
+    def _pop_all_regs_from_jitframe(self, mc, ignored_regs, withfloats,
+                                 callee_only=False):
+        # Pop all general purpose registers
+        base_ofs = self.cpu.get_baseofs_of_frame_field()
+        if callee_only:
+            regs = CoreRegisterManager.save_around_call_regs
+        else:
+            regs = CoreRegisterManager.all_regs
+        # XXX use LDMDB ops here
+        for i, gpr in enumerate(regs):
+            if gpr in ignored_regs:
+                continue
+            ofs = i * WORD + base_ofs
+            self.load_reg(mc, gpr, r.fp, ofs)
+        if withfloats:
+            # Pop all XMM regs
+            if callee_only:
+                regs = VFPRegisterManager.save_around_call_regs
+            else:
+                regs = VFPRegisterManager.all_regs
+            for i, vfpr in enumerate(regs):
+                if vfpr in ignored_regs:
+                    continue
+                ofs = len(CoreRegisterManager.all_regs) * WORD
+                ofs += i * DOUBLE_WORD + base_ofs
+                self.load_reg(mc, vfpr, r.fp, ofs)
 
     def _build_failure_recovery(self, exc, withfloats=False):
         mc = ARMv7Builder()
@@ -434,8 +464,8 @@
 
         # set return value
         assert check_imm_arg(base_ofs)
-        mc.SUB_ri(r.r0.value, r.fp.value, base_ofs)
-
+        mc.MOV_rr(r.r0.value, r.fp.value)
+        #
         self.gen_func_epilog(mc)
         rawstart = mc.materialize(self.cpu.asmmemmgr, [])
         self.failure_recovery_code[exc + 2 * withfloats] = rawstart
@@ -547,10 +577,8 @@
         self.mc.SUB_ri(r.sp.value, r.sp.value, WORD) # for the force index
         assert stack_size % 8 == 0 # ensure we keep alignment
 
-        # set fp to point to the JITFRAME + ofs
-        ofs = self.cpu.get_baseofs_of_frame_field()
-        assert check_imm_arg(ofs)
-        self.mc.ADD_ri(r.fp.value, r.r0.value, imm=ofs)
+        # set fp to point to the JITFRAME
+        self.mc.MOV_rr(r.fp.value, r.r0.value)
         #
         gcrootmap = self.cpu.gc_ll_descr.gcrootmap
         if gcrootmap and gcrootmap.is_shadow_stack:
@@ -734,9 +762,12 @@
             faildescr._arm_bridge_frame_depth = frame_depth
             if log:
                 self.mc._dump_trace(rawstart, 'bridge.asm')
+
+        ops_offset = self.mc.ops_offset
         frame_depth = max(self.current_clt.frame_info.jfi_frame_depth,
-                          frame_depth + JITFRAME_FIXED_SIZE)
-        ops_offset = self.mc.ops_offset
+                          frame_depth_no_fixed_size + JITFRAME_FIXED_SIZE)
+        self.fixup_target_tokens(rawstart)
+        self.update_frame_depth(frame_depth)
         self.teardown()
 
         debug_start("jit-backend-addr")
@@ -1309,6 +1340,7 @@
         mc.MOV_bi(ofs, 0)
 
 
+
 def not_implemented(msg):
     os.write(2, '[ARM/asm] %s\n' % msg)
     raise NotImplementedError(msg)
diff --git a/rpython/jit/backend/arm/locations.py b/rpython/jit/backend/arm/locations.py
--- a/rpython/jit/backend/arm/locations.py
+++ b/rpython/jit/backend/arm/locations.py
@@ -136,5 +136,5 @@
     return ImmLocation(i)
 
 
-def get_fp_offset(position):
-    return WORD * (position + JITFRAME_FIXED_SIZE)
+def get_fp_offset(base_ofs, position):
+    return base_ofs + WORD * (position + JITFRAME_FIXED_SIZE)
diff --git a/rpython/jit/backend/arm/opassembler.py b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -67,8 +67,8 @@
                 if loc.is_reg():
                     val = loc.value
                 else:
-                    assert 0, 'ffuu, implement'
-                    val = loc.value // WORD
+                    assert loc.is_stack()
+                    val = JITFRAME_FIXED_SIZE + loc.value
                 gcmap[val // WORD // 8] |= r_uint(1) << (val % (WORD * 8))
         return gcmap
 
@@ -358,25 +358,20 @@
         return fcond
 
     def emit_op_finish(self, op, arglocs, regalloc, fcond):
-        base_ofs = self.cpu.get_baseofs_of_frame_field() - WORD
+        base_ofs = self.cpu.get_baseofs_of_frame_field()
         if len(arglocs) == 2:
             [return_val, fail_descr_loc] = arglocs
-            if op.getarg(0).type == FLOAT:
-                self.mc.VSTR(return_val.value, r.fp.value)#, imm=-base_ofs)
-            else:
-                self.mc.STR_ri(return_val.value, r.fp.value)#, imm=-base_ofs)
-            #self.save_into_mem(raw_stack(0), return_val, imm(size))
+            self.store_reg(self.mc, return_val, r.fp, base_ofs)
         else:
             [fail_descr_loc] = arglocs
         ofs = self.cpu.get_ofs_of_frame_field('jf_descr')
-        base_ofs = self.cpu.get_baseofs_of_frame_field()
 
         self.mc.gen_load_int(r.ip.value, fail_descr_loc.value)
         # XXX self.mov(fail_descr_loc, RawStackLoc(ofs))
-        self.mc.STR_ri(r.ip.value, r.fp.value, imm=ofs)
+        self.store_reg(self.mc, r.ip, r.fp, ofs, helper=r.lr)
         gcmap = self.gcmap_for_finish
         self.push_gcmap(self.mc, gcmap, store=True)
-        self.mc.SUB_ri(r.r0.value, r.fp.value, base_ofs)
+        self.mc.MOV_rr(r.r0.value, r.fp.value)
         # exit function
         self.gen_func_epilog()
         return fcond
diff --git a/rpython/jit/backend/arm/regalloc.py b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -61,12 +61,12 @@
 
 class ARMFrameManager(FrameManager):
 
-    def __init__(self):
+    def __init__(self, base_ofs):
         FrameManager.__init__(self)
+        self.base_ofs = base_ofs
 
-    @staticmethod
-    def frame_pos(i, box_type):
-        return locations.StackLocation(i, get_fp_offset(i), box_type)
+    def frame_pos(self, i, box_type):
+        return locations.StackLocation(i, get_fp_offset(self.base_ofs, i), box_type)
 
     @staticmethod
     def frame_size(type):
@@ -282,8 +282,9 @@
             return self.vfprm.convert_to_imm(value)
 
     def _prepare(self, inputargs, operations, allgcrefs):
-        self.frame_manager = self.fm = ARMFrameManager()
         cpu = self.assembler.cpu
+        self.fm = ARMFrameManager(cpu.get_baseofs_of_frame_field())
+        self.frame_manager = self.fm
         operations = cpu.gc_ll_descr.rewrite_assembler(cpu, operations,
                                                        allgcrefs)
         # compute longevity of variables


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