[pypy-commit] pypy stmgc-c4: add resop for incrementing debug counters

[Raemi]

Author: Remi Meier <remi.meier at gmail.com>
Branch: stmgc-c4
Changeset: r65904:2f66010fc1df
Date: 2013-08-02 15:02 +0200
http://bitbucket.org/pypy/pypy/changeset/2f66010fc1df/

Log:	add resop for incrementing debug counters

diff --git a/rpython/jit/backend/llgraph/runner.py b/rpython/jit/backend/llgraph/runner.py
--- a/rpython/jit/backend/llgraph/runner.py
+++ b/rpython/jit/backend/llgraph/runner.py
@@ -961,6 +961,9 @@
     def execute_cond_call_stm_b(self, descr, a):
         py.test.skip("cond_call_stm_b not supported")
 
+    def execute_increment_debug_counter(self, descr, a):
+        pass
+
     def execute_keepalive(self, descr, x):
         pass
 
diff --git a/rpython/jit/backend/llsupport/assembler.py b/rpython/jit/backend/llsupport/assembler.py
--- a/rpython/jit/backend/llsupport/assembler.py
+++ b/rpython/jit/backend/llsupport/assembler.py
@@ -269,23 +269,16 @@
                 if op.getopnum() == rop.LABEL:
                     self._append_debugging_code(newoperations, 'l', number,
                                                 op.getdescr())
-            if not self.cpu.gc_ll_descr.stm:
-                # XXX: find a workaround to ignore inserting $INEV for
-                # raw accesses here
-                operations = newoperations
+            operations = newoperations
         return operations
 
     def _append_debugging_code(self, operations, tp, number, token):
         counter = self._register_counter(tp, number, token)
         c_adr = ConstInt(rffi.cast(lltype.Signed, counter))
-        box = BoxInt()
-        box2 = BoxInt()
-        ops = [ResOperation(rop.GETFIELD_RAW, [c_adr],
-                            box, descr=self.debug_counter_descr),
-               ResOperation(rop.INT_ADD, [box, ConstInt(1)], box2),
-               ResOperation(rop.SETFIELD_RAW, [c_adr, box2],
-                            None, descr=self.debug_counter_descr)]
-        operations.extend(ops)
+        operations.append(
+            ResOperation(rop.INCREMENT_DEBUG_COUNTER,
+                         [c_adr], None, descr=self.debug_counter_descr))
+
 
     def _register_counter(self, tp, number, token):
         # YYY very minor leak -- we need the counters to stay alive
diff --git a/rpython/jit/backend/llsupport/stmrewrite.py b/rpython/jit/backend/llsupport/stmrewrite.py
--- a/rpython/jit/backend/llsupport/stmrewrite.py
+++ b/rpython/jit/backend/llsupport/stmrewrite.py
@@ -45,6 +45,9 @@
         for op in operations:
             if op.getopnum() == rop.DEBUG_MERGE_POINT:
                 continue
+            if op.getopnum() == rop.INCREMENT_DEBUG_COUNTER:
+                self.newops.append(op)
+                continue
             # ----------  ptr_eq  ----------
             if op.getopnum() in (rop.PTR_EQ, rop.INSTANCE_PTR_EQ,
                                  rop.PTR_NE, rop.INSTANCE_PTR_NE):
diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1609,6 +1609,15 @@
                                                 ofs_loc)
         self.load_from_mem(resloc, src_addr, fieldsize_loc, sign_loc)
 
+    def genop_discard_increment_debug_counter(self, op, arglocs):
+        assert IS_X86_64
+        # I'm getting lazy. mem_reg_plus_const does not support 
+        # ebp as a register, but that is what we get from the regalloc
+        # (mostly?) -> change to SCRATCH_REG
+        base_loc, ofs_loc, size_loc = arglocs
+        self.mc.MOV(X86_64_SCRATCH_REG, base_loc)
+        self.mc.INC_m((X86_64_SCRATCH_REG.value, ofs_loc.getint()))
+    
     def genop_discard_setfield_gc(self, op, arglocs):
         base_loc, ofs_loc, size_loc, value_loc = arglocs
         assert isinstance(size_loc, ImmedLoc)
diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -1008,6 +1008,14 @@
     consider_getfield_raw_pure = consider_getfield_gc
     consider_getfield_gc_pure = consider_getfield_gc
 
+    def consider_increment_debug_counter(self, op):
+        ofs, size, _ = unpack_fielddescr(op.getdescr())
+        ofs_loc = imm(ofs)
+        size_loc = imm(size)
+        base_loc = self.loc(op.getarg(0))
+        self.perform_discard(op, [base_loc, ofs_loc, size_loc])
+
+        
     def consider_getarrayitem_gc(self, op):
         itemsize, ofs, sign = unpack_arraydescr(op.getdescr())
         args = op.getarglist()
diff --git a/rpython/jit/backend/x86/rx86.py b/rpython/jit/backend/x86/rx86.py
--- a/rpython/jit/backend/x86/rx86.py
+++ b/rpython/jit/backend/x86/rx86.py
@@ -472,6 +472,8 @@
 
     # ------------------------------ Arithmetic ------------------------------
 
+    INC_m = insn(rex_w, '\xFF', orbyte(0), mem_reg_plus_const(1))
+    
     ADD_ri,ADD_rr,ADD_rb,_,_,ADD_rm,_,ADD_rj,_,_ = common_modes(0)
     OR_ri, OR_rr, OR_rb, _,_,OR_rm, _,OR_rj, _,_ = common_modes(1)
     AND_ri,AND_rr,AND_rb,_,_,AND_rm,_,AND_rj,_,_ = common_modes(4)
diff --git a/rpython/jit/metainterp/executor.py b/rpython/jit/metainterp/executor.py
--- a/rpython/jit/metainterp/executor.py
+++ b/rpython/jit/metainterp/executor.py
@@ -344,6 +344,7 @@
                     continue
             if value in (rop.FORCE_TOKEN,
                          rop.CALL_ASSEMBLER,
+                         rop.INCREMENT_DEBUG_COUNTER,
                          rop.COND_CALL_GC_WB,
                          rop.COND_CALL_GC_WB_ARRAY,
                          rop.COND_CALL_STM_B,
diff --git a/rpython/jit/metainterp/resoperation.py b/rpython/jit/metainterp/resoperation.py
--- a/rpython/jit/metainterp/resoperation.py
+++ b/rpython/jit/metainterp/resoperation.py
@@ -490,6 +490,7 @@
     'MARK_OPAQUE_PTR/1b',
     '_NOSIDEEFFECT_LAST', # ----- end of no_side_effect operations -----
 
+    'INCREMENT_DEBUG_COUNTER/1d',        
     'SETARRAYITEM_GC/3d',
     'SETARRAYITEM_RAW/3d',
     'SETINTERIORFIELD_GC/3d',