[pypy-commit] pypy default: some code and naming cleanups

[bivab]

Author: David Schneider <david.schneider at picle.org>
Branch: 
Changeset: r62926:2a95e0487acb
Date: 2013-04-02 19:31 +0200
http://bitbucket.org/pypy/pypy/changeset/2a95e0487acb/

Log:	some code and naming cleanups

diff --git a/rpython/jit/backend/arm/opassembler.py b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -342,7 +342,7 @@
     def _emit_call(self, adr, arglocs, fcond=c.AL, resloc=None,
                                             result_info=(-1, -1),
                                             can_collect=1):
-        if self.cpu.use_hf_abi:
+        if self.cpu.hf_abi:
             stack_args, adr = self._setup_call_hf(adr, arglocs, fcond,
                                             resloc, result_info)
         else:
@@ -368,7 +368,7 @@
 
         # ensure the result is wellformed and stored in the correct location
         if resloc is not None:
-            if resloc.is_vfp_reg() and not self.cpu.use_hf_abi:
+            if resloc.is_vfp_reg() and not self.cpu.hf_abi:
                 # move result to the allocated register
                 self.mov_to_vfp_loc(r.r0, r.r1, resloc)
             elif resloc.is_reg() and result_info != (-1, -1):
diff --git a/rpython/jit/backend/arm/runner.py b/rpython/jit/backend/arm/runner.py
--- a/rpython/jit/backend/arm/runner.py
+++ b/rpython/jit/backend/arm/runner.py
@@ -1,7 +1,6 @@
 from rpython.jit.backend.arm.arch import JITFRAME_FIXED_SIZE
 from rpython.jit.backend.arm.assembler import AssemblerARM
-from rpython.jit.backend.arm.regalloc import CoreRegisterManager,\
-     VFPRegisterManager
+from rpython.jit.backend.arm.regalloc import VFPRegisterManager
 from rpython.jit.backend.arm.registers import fp, all_regs
 from rpython.jit.backend.llsupport import jitframe
 from rpython.jit.backend.llsupport.llmodel import AbstractLLCPU
@@ -25,7 +24,7 @@
     float_regs = VFPRegisterManager.all_regs
     frame_reg = fp
 
-    use_hf_abi = False        # use hard float abi flag
+    hf_abi = False        # use hard float abi flag
     arch_version = 7
 
     def __init__(self, rtyper, stats, opts=None, translate_support_code=False,
@@ -33,7 +32,6 @@
         AbstractLLCPU.__init__(self, rtyper, stats, opts,
                                translate_support_code, gcdescr)
 
-
     def set_debug(self, flag):
         return self.assembler.set_debug(flag)
 
@@ -72,7 +70,7 @@
 
     def cast_ptr_to_int(x):
         adr = llmemory.cast_ptr_to_adr(x)
-        return ArmCPU.cast_adr_to_int(adr)
+        return CPU_ARM.cast_adr_to_int(adr)
     cast_ptr_to_int._annspecialcase_ = 'specialize:arglltype(0)'
     cast_ptr_to_int = staticmethod(cast_ptr_to_int)
 
@@ -112,21 +110,23 @@
         assert self.assembler is not None
         return Regalloc(self.assembler)
 
+
 class CPU_ARM(AbstractARMCPU):
     """ARM v7 uses softfp ABI, requires vfp"""
     backend_name = "armv7"
-ArmCPU = CPU_ARM
+
 
 class CPU_ARMHF(AbstractARMCPU):
     """ARM v7 uses hardfp ABI, requires vfp"""
-    use_hf_abi = True
+    hf_abi = True
     backend_name = "armv7hf"
     supports_floats = False
     supports_singlefloats = False
 
-class CPU_ARMv6(AbstractARMCPU):
+
+class CPU_ARMv6HF(AbstractARMCPU):
     """ ARM v6, uses hardfp ABI, requires vfp"""
-    use_hf_abi = True
+    hf_abi = True
     arch_version = 6
     backend_name = "armv6hf"
     supports_floats = False
diff --git a/rpython/jit/backend/detect_cpu.py b/rpython/jit/backend/detect_cpu.py
--- a/rpython/jit/backend/detect_cpu.py
+++ b/rpython/jit/backend/detect_cpu.py
@@ -78,7 +78,7 @@
     elif backend_name == 'cli':
         return "rpython.jit.backend.cli.runner", "CliCPU"
     elif backend_name == 'armv6hf':
-        return "rpython.jit.backend.arm.runner", "CPU_ARMv6"
+        return "rpython.jit.backend.arm.runner", "CPU_ARMv6HF"
     elif backend_name == 'armv7':
         return "rpython.jit.backend.arm.runner", "CPU_ARM"
     elif backend_name == 'armv7hf':