[pypy-commit] pypy ppc-jit-backend: merge

[hager]

Author: hager <sven.hager at uni-duesseldorf.de>
Branch: ppc-jit-backend
Changeset: r49047:68560c739dce
Date: 2011-11-09 19:52 +0100
http://bitbucket.org/pypy/pypy/changeset/68560c739dce/

Log:	merge

diff --git a/pypy/jit/backend/ppc/ppcgen/opassembler.py b/pypy/jit/backend/ppc/ppcgen/opassembler.py
--- a/pypy/jit/backend/ppc/ppcgen/opassembler.py
+++ b/pypy/jit/backend/ppc/ppcgen/opassembler.py
@@ -502,9 +502,14 @@
         stack_space = 4 * (WORD + len(stack_args))
         while stack_space % (4 * WORD) != 0:
             stack_space += 1
-        self.mc.stwu(1, 1, -stack_space)
-        self.mc.mflr(0)
-        self.mc.stw(0, 1, stack_space + WORD)
+        if IS_PPC_32:
+            self.mc.stwu(r.SP.value, r.SP.value, -stack_space)
+            self.mc.mflr(r.r0.value)
+            self.mc.stw(r.r0.value, r.SP.value, stack_space + WORD)
+        else:
+            self.mc.stdu(r.SP.value, r.SP.value, -stack_space)
+            self.mc.mflr(r.r0.value)
+            self.mc.std(r.r0.value, r.SP.value, stack_space + WORD)
 
         # then we push everything on the stack
         for i, arg in enumerate(stack_args):
@@ -549,9 +554,7 @@
         #the actual call
         if IS_PPC_32:
             self.mc.bl_abs(adr)
-            self.mc.lwz(0, 1, stack_space + WORD)
-            self.mc.mtlr(0)
-            self.mc.addi(1, 1, stack_space)
+            self.mc.lwz(r.r0.value, r.SP.value, stack_space + WORD)
         else:
             self.mc.std(r.r2.value, r.SP.value, 40)
             self.mc.load_from_addr(r.r0, adr)
@@ -560,6 +563,9 @@
             self.mc.mtctr(r.r0.value)
             self.mc.bctrl()
             self.mc.ld(r.r2.value, r.SP.value, 40)
+            self.mc.ld(r.r0.value, r.SP.value, stack_space + WORD)
+        self.mc.mtlr(r.r0.value)
+        self.mc.addi(r.SP.value, r.SP.value, stack_space)
 
         self.mark_gc_roots(force_index)
         regalloc.possibly_free_vars(args)
diff --git a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
--- a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
+++ b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
@@ -8,7 +8,8 @@
 from pypy.jit.backend.ppc.ppcgen.opassembler import OpAssembler
 from pypy.jit.backend.ppc.ppcgen.symbol_lookup import lookup
 from pypy.jit.backend.ppc.ppcgen.codebuilder import PPCBuilder
-from pypy.jit.backend.ppc.ppcgen.arch import (IS_PPC_32, WORD, NONVOLATILES,
+from pypy.jit.backend.ppc.ppcgen.arch import (IS_PPC_32, IS_PPC_64, WORD,
+                                              NONVOLATILES,
                                               GPR_SAVE_AREA, BACKCHAIN_SIZE)
 from pypy.jit.backend.ppc.ppcgen.helper.assembler import (gen_emit_cmp_op, 
                                                           encode32, decode32)
@@ -134,7 +135,7 @@
         else:
             self.mc.stdu(r.SP.value, r.SP.value, -frame_depth)
             self.mc.mflr(r.r0.value)
-            self.mc.std(r.r0.value, r.SP.value, frame_depth + 2 * WORD)
+            self.mc.std(r.r0.value, r.SP.value, frame_depth + WORD)
         offset = GPR_SAVE_AREA + WORD
         # compute spilling pointer (SPP)
         self.mc.addi(r.SPP.value, r.SP.value, frame_depth - offset)
@@ -296,7 +297,10 @@
         # XXX do quadword alignment
         #while size % (4 * WORD) != 0:
         #    size += WORD
-        mc.addi(r.SP.value, r.SP.value, -size)
+        if IS_PPC_32:
+            mc.stwu(r.SP.value, r.SP.value, -size)
+        else:
+            mc.stdu(r.SP.value, r.SP.value, -size)
         #
         decode_func_addr = llhelper(self.recovery_func_sign,
                 self.failure_recovery_func)
@@ -306,6 +310,7 @@
             intp = lltype.Ptr(lltype.Array(lltype.Signed, hints={'nolength': True}))
             descr = rffi.cast(intp, decode_func_addr)
             addr = descr[0]
+            r2_value = descr[1]
             r11_value = descr[2]
 
         #
@@ -319,7 +324,9 @@
         #
         # load address of decoding function into r0
         mc.load_imm(r.r0, addr)
-        mc.load_imm(r.r11, r11_value)
+        if IS_PPC_64:
+            mc.load_imm(r.r2, r2_value)
+            mc.load_imm(r.r11, r11_value)
         # ... and branch there
         mc.mtctr(r.r0.value)
         mc.bctrl()
@@ -675,7 +682,7 @@
     def _ensure_result_bit_extension(self, resloc, size, signed):
         if size == 1:
             if not signed: #unsigned char
-                if IS_PPC32:
+                if IS_PPC_32:
                     self.mc.rlwinm(resloc.value, resloc.value, 0, 24, 31)
                 else:
                     self.mc.rldicl(resloc.value, resloc.value, 0, 56)
diff --git a/pypy/jit/backend/ppc/ppcgen/register.py b/pypy/jit/backend/ppc/ppcgen/register.py
--- a/pypy/jit/backend/ppc/ppcgen/register.py
+++ b/pypy/jit/backend/ppc/ppcgen/register.py
@@ -12,6 +12,7 @@
 
 SPP = r31
 SP  = r1
+TOC = r2
 RES = r3
 
 MANAGED_REGS = [r3, r4, r5, r6, r7, r8, r9, r10,