[pypy-commit] pypy jitypes2: Fixes:

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: jitypes2
Changeset: r44183:3d6de0d862fb
Date: 2011-05-15 18:03 +0200
http://bitbucket.org/pypy/pypy/changeset/3d6de0d862fb/

Log:	Fixes:

	* a call to genop_call() should go to _genop_call() instead,
	passing the fail_index.

	* two _emit_call()s are missing the first argument. Maybe a
	result of the merge.

diff --git a/pypy/jit/backend/x86/assembler.py b/pypy/jit/backend/x86/assembler.py
--- a/pypy/jit/backend/x86/assembler.py
+++ b/pypy/jit/backend/x86/assembler.py
@@ -2040,13 +2040,17 @@
         if gcrootmap:
             # note that regalloc.py used save_all_regs=True to save all
             # registers, so we don't have to care about saving them (other
-            # than ebp) in the close_stack_struct
+            # than ebp) in the close_stack_struct.  But if they are registers
+            # like %eax that would be destroyed by this call, *and* they are
+            # used by arglocs for the *next* call, then trouble; for now we
+            # will just push/pop them.
+            XXXXXXX
             self.call_close_stack()
         # do the call
         faildescr = guard_op.getdescr()
         fail_index = self.cpu.get_fail_descr_number(faildescr)
         self.mc.MOV_bi(FORCE_INDEX_OFS, fail_index)
-        self.genop_call(op, arglocs, result_loc)
+        self._genop_call(op, arglocs, result_loc, fail_index)
         # then reopen the stack
         if gcrootmap:
             self.call_reopen_stack(result_loc)
@@ -2077,7 +2081,7 @@
         elif IS_X86_64:
             reg = edi
         self.mc.LEA_rb(reg.value, css)
-        self._emit_call(imm(self.closestack_addr), [reg])
+        self._emit_call(-1, imm(self.closestack_addr), [reg])
 
     def call_reopen_stack(self, save_loc):
         # save the previous result (eax/xmm0) into the stack temporarily
@@ -2095,7 +2099,7 @@
         elif IS_X86_64:
             reg = edi
         self.mc.LEA_rb(reg.value, css)
-        self._emit_call(imm(self.reopenstack_addr), [reg])
+        self._emit_call(-1, imm(self.reopenstack_addr), [reg])
         # restore the result from the stack
         if isinstance(save_loc, RegLoc):
             if save_loc.is_xmm:
diff --git a/pypy/jit/backend/x86/regalloc.py b/pypy/jit/backend/x86/regalloc.py
--- a/pypy/jit/backend/x86/regalloc.py
+++ b/pypy/jit/backend/x86/regalloc.py
@@ -840,14 +840,7 @@
         assert guard_op is not None
         self._consider_call(op, guard_op)
 
-    def consider_call_release_gil(self, op, guard_op):
-        # first force the registers like eax into the stack, because of
-        # the initial call to _close_stack()
-        self.rm.before_call()
-        self.xrm.before_call()
-        #
-        assert guard_op is not None
-        self._consider_call(op, guard_op)
+    consider_call_release_gil = consider_call_may_force
 
     def consider_call_assembler(self, op, guard_op):
         descr = op.getdescr()