[pypy-svn] pypy arm-backend-2: (arigo, david) when generating code for a call, force the variable stored in r0 to be spilled if the call has a return value and ensure a register can not be bound to two boxes after a call.
bivab
commits-noreply at bitbucket.org
Wed Feb 16 14:20:56 CET 2011
Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r42034:95434737666e
Date: 2011-02-16 14:20 +0100
http://bitbucket.org/pypy/pypy/changeset/95434737666e/
Log: (arigo, david) when generating code for a call, force the variable
stored in r0 to be spilled if the call has a return value and ensure
a register can not be bound to two boxes after a call.
diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -268,9 +268,13 @@
regalloc.before_call(save_all_regs=spill_all_regs)
else:
if result:
- # XXX maybe move instance check to llsupport/regalloc
- if reg_args > 0 and isinstance(args[0], Box) and regalloc.stays_alive(args[0]):
- regalloc.force_spill_var(args[0])
+ # XXX hack if the call has a result force the value in r0 to be
+ # spilled
+ if reg_args == 0 or (isinstance(args[0], Box) and
+ regalloc.stays_alive(args[0])):
+ t = TempBox()
+ regalloc.force_allocate_reg(t, selected_reg=regalloc.call_result_location(t))
+ regalloc.possibly_free_var(t)
self.mc.PUSH([reg.value for reg in r.caller_resp][1:])
else:
self.mc.PUSH([reg.value for reg in r.caller_resp])
diff --git a/pypy/jit/backend/llsupport/regalloc.py b/pypy/jit/backend/llsupport/regalloc.py
--- a/pypy/jit/backend/llsupport/regalloc.py
+++ b/pypy/jit/backend/llsupport/regalloc.py
@@ -324,6 +324,8 @@
"""
self._check_type(v)
r = self.call_result_location(v)
+ if not we_are_translated():
+ assert r not in self.reg_bindings.values()
self.reg_bindings[v] = r
self.free_regs = [fr for fr in self.free_regs if fr is not r]
return r
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