[pypy-svn] r70216 - in pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86: . test
arigo at codespeak.net
arigo at codespeak.net
Sun Dec 20 14:19:51 CET 2009
Author: arigo
Date: Sun Dec 20 14:19:50 2009
New Revision: 70216
Modified:
pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/assembler.py
pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/codebuf.py
pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/regloc.py
pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/rx86.py
pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86.py
pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86_32_auto_encoding.py
Log:
Progress.
Modified: pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/assembler.py
==============================================================================
--- pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/assembler.py (original)
+++ pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/assembler.py Sun Dec 20 14:19:50 2009
@@ -17,8 +17,7 @@
xmm4, xmm5, xmm6, xmm7,
RegLoc, StackLoc)
from pypy.rlib.objectmodel import we_are_translated, specialize
-from pypy.jit.backend.x86 import rx86
-from pypy.jit.backend.x86 import codebuf
+from pypy.jit.backend.x86 import rx86, regloc, codebuf
from pypy.jit.metainterp.resoperation import rop
from pypy.jit.backend.x86.support import values_array
from pypy.rlib.debug import debug_print
@@ -72,7 +71,7 @@
method.func_name = name
return method
-for _name in rx86.all_instructions:
+for _name in rx86.all_instructions + regloc.all_extra_instructions:
setattr(MachineCodeBlockWrapper, _name, _new_method(_name))
class Assembler386(object):
@@ -180,8 +179,8 @@
arglocs = self.rebuild_faillocs_from_descr(
faildescr._x86_failure_recovery_bytecode)
if not we_are_translated():
- assert ([loc.assembler() for loc in arglocs] ==
- [loc.assembler() for loc in faildescr._x86_debug_faillocs])
+ assert ([repr(loc) for loc in arglocs] ==
+ [repr(loc) for loc in faildescr._x86_debug_faillocs])
regalloc = RegAlloc(self, self.cpu.translate_support_code)
fail_depths = faildescr._x86_current_depths
regalloc.prepare_bridge(fail_depths, inputargs, arglocs,
@@ -239,11 +238,11 @@
def _assemble_bootstrap_code(self, inputargs, arglocs):
nonfloatlocs, floatlocs = arglocs
- self.mc.PUSH_r(ebp.value)
+ self.mc.PUSH(ebp)
self.mc.MOV_rr(ebp.value, esp.value)
- self.mc.PUSH_r(ebx.value)
- self.mc.PUSH_r(esi.value)
- self.mc.PUSH_r(edi.value)
+ self.mc.PUSH(ebx)
+ self.mc.PUSH(esi)
+ self.mc.PUSH(edi)
# NB. the shape of the frame is hard-coded in get_basic_shape() too.
# Also, make sure this is consistent with FRAME_FIXED_SIZE.
adr_stackadjust = self._patchable_stackadjust()
@@ -432,25 +431,29 @@
getattr(self.mc, 'SET' + cond)(lower_byte(result_loc))
return genop_cmp
- def _cmpop_guard(cond, rev_cond, false_cond, false_rev_cond):
+ def _cmpop_guard(cond, rev_cond):
+ cond = rx86.Conditions[cond]
+ rev_cond = rx86.Conditions[rev_cond]
+ false_cond = cond ^ 1
+ false_rev_cond = rev_cond ^ 1
+ #
def genop_cmp_guard(self, op, guard_op, addr, arglocs, result_loc):
guard_opnum = guard_op.opnum
- if isinstance(op.args[0], Const):
- self.mc.CMP(arglocs[1], arglocs[0])
+ loc0 = arglocs[0]
+ loc1 = arglocs[1]
+ if isinstance(loc0, Const):
+ self.mc.CMP_IMM(loc1, loc0)
if guard_opnum == rop.GUARD_FALSE:
- name = 'J' + rev_cond
- return self.implement_guard(addr, getattr(self.mc, name))
+ c = rev_cond
else:
- name = 'J' + false_rev_cond
- return self.implement_guard(addr, getattr(self.mc, name))
+ c = false_rev_cond
else:
- self.mc.CMP(arglocs[0], arglocs[1])
+ self.mc.CMP(loc0, loc1)
if guard_opnum == rop.GUARD_FALSE:
- name = 'J' + cond
- return self.implement_guard(addr, getattr(self.mc, name))
+ c = cond
else:
- name = 'J' + false_cond
- return self.implement_guard(addr, getattr(self.mc, name))
+ c = false_cond
+ return self.implement_guard(addr, c)
return genop_cmp_guard
## XXX redo me
@@ -529,17 +532,17 @@
genop_uint_le = _cmpop("BE", "AE")
genop_uint_ge = _cmpop("AE", "BE")
- genop_guard_int_lt = _cmpop_guard("L", "G", "GE", "LE")
- genop_guard_int_le = _cmpop_guard("LE", "GE", "G", "L")
- genop_guard_int_eq = _cmpop_guard("E", "E", "NE", "NE")
- genop_guard_int_ne = _cmpop_guard("NE", "NE", "E", "E")
- genop_guard_int_gt = _cmpop_guard("G", "L", "LE", "GE")
- genop_guard_int_ge = _cmpop_guard("GE", "LE", "L", "G")
-
- genop_guard_uint_gt = _cmpop_guard("A", "B", "BE", "AE")
- genop_guard_uint_lt = _cmpop_guard("B", "A", "AE", "BE")
- genop_guard_uint_le = _cmpop_guard("BE", "AE", "A", "B")
- genop_guard_uint_ge = _cmpop_guard("AE", "BE", "B", "A")
+ genop_guard_int_lt = _cmpop_guard("L", "G")
+ genop_guard_int_le = _cmpop_guard("LE", "GE")
+ genop_guard_int_eq = _cmpop_guard("E", "E")
+ genop_guard_int_ne = _cmpop_guard("NE", "NE")
+ genop_guard_int_gt = _cmpop_guard("G", "L")
+ genop_guard_int_ge = _cmpop_guard("GE", "LE")
+
+ genop_guard_uint_gt = _cmpop_guard("A", "B")
+ genop_guard_uint_lt = _cmpop_guard("B", "A")
+ genop_guard_uint_le = _cmpop_guard("BE", "AE")
+ genop_guard_uint_ge = _cmpop_guard("AE", "BE")
def genop_float_neg(self, op, arglocs, resloc):
# Following what gcc does: res = x ^ 0x8000000000000000
@@ -960,9 +963,9 @@
kind = code & 3
code >>= 2
if kind == self.DESCR_FLOAT:
- loc = xmm_registers[code]
+ loc = regloc.XMMREGLOCS[code]
else:
- loc = registers[code]
+ loc = regloc.REGLOCS[code]
arglocs.append(loc)
return arglocs[:]
@@ -1001,7 +1004,7 @@
def grab_frame_values(self, bytecode, frame_addr, allregisters):
# no malloc allowed here!!
- self.fail_ebp = allregisters[16 + ebp.op]
+ self.fail_ebp = allregisters[16 + ebp.value]
num = 0
value_hi = 0
while 1:
@@ -1068,7 +1071,7 @@
# original value of the registers, optionally the original
# value of XMM registers, and finally a reference to the
# recovery bytecode. See _build_failure_recovery() for details.
- stack_at_ebp = registers[ebp.op]
+ stack_at_ebp = registers[ebp.value]
bytecode = rffi.cast(rffi.UCHARP, registers[8])
allregisters = rffi.ptradd(registers, -16)
return self.grab_frame_values(bytecode, stack_at_ebp, allregisters)
@@ -1088,14 +1091,14 @@
# Assume that we are called at the beginning, when there is no risk
# that 'mc' runs out of space. Checked by asserts in mc.write().
recovery_addr = mc.tell()
- mc.PUSH_r(edi.value)
- mc.PUSH_r(esi.value)
- mc.PUSH_r(ebp.value)
- mc.PUSH_r(esp.value) # <-- not really used, but needed to take
- mc.PUSH_r(ebx.value) # up the space
- mc.PUSH_r(edx.value)
- mc.PUSH_r(ecx.value)
- mc.PUSH_r(eax.value)
+ mc.PUSH(edi)
+ mc.PUSH(esi)
+ mc.PUSH(ebp)
+ mc.PUSH(esp) # <-- not really used, but needed to take up the space
+ mc.PUSH(ebx)
+ mc.PUSH(edx)
+ mc.PUSH(ecx)
+ mc.PUSH(eax)
mc.MOV_rr(esi.value, esp.value)
if withfloats:
mc.SUB_ri(esp.value, 8*8)
@@ -1117,7 +1120,7 @@
# the XMM registers. Moreover, esi[8] is a pointer to the recovery
# bytecode, pushed just before by the CALL instruction written by
# generate_quick_failure().
- mc.PUSH_r(esi.value)
+ mc.PUSH(esi)
mc.CALL_l(failure_recovery_func)
# returns in eax the fail_index
@@ -1125,10 +1128,10 @@
# _assemble_bootstrap_code(). The LEA below throws away most
# of the frame, including all the PUSHes that we did just above.
mc.LEA_rb(esp.value, -3 * WORD)
- mc.POP_r(edi.value) # [ebp-12]
- mc.POP_r(esi.value) # [ebp-8]
- mc.POP_r(ebx.value) # [ebp-4]
- mc.POP_r(ebp.value) # [ebp]
+ mc.POP(edi) # [ebp-12]
+ mc.POP(esi) # [ebp-8]
+ mc.POP(ebx) # [ebp-4]
+ mc.POP(ebp) # [ebp]
mc.RET()
self.mc2.done()
self.failure_recovery_code[exc + 2 * withfloats] = recovery_addr
@@ -1140,11 +1143,10 @@
if isinstance(loc, RegLoc):
self.mc.MOVSD_mr((tmpreg.value, 0), loc.value)
else:
- assert isinstance(loc, ConstInt)
- value = rffi.cast(rffi.INTP, loc.value)[0]
- self.mc.MOV_mi((tmpreg.value, 0), value)
- value = rffi.cast(rffi.INTP, loc.value)[1]
- self.mc.MOV_mi((tmpreg.value, 4), value)
+ assert isinstance(loc, Const)
+ src = rffi.cast(rffi.INTP, loc.getint())
+ self.mc.MOV_mi((tmpreg.value, 0), src[0])
+ self.mc.MOV_mi((tmpreg.value, 4), src[1])
else:
if v.type == REF:
destadr = self.fail_boxes_ref.get_addr_for_num(i)
@@ -1154,8 +1156,8 @@
if isinstance(loc, RegLoc):
self.mc.MOV_mr((tmpreg.value, 0), loc.value)
else:
- assert isinstance(loc, ConstInt)
- self.mc.MOV_mi((tmpreg.value, 0), loc.value)
+ assert isinstance(loc, Const)
+ self.mc.MOV_mi((tmpreg.value, 0), loc.getint())
def generate_failure(self, fail_index, exc):
# avoid breaking the following code sequence, as we are almost done
@@ -1170,15 +1172,14 @@
#
mc.LEA_rb(esp.value, -3 * WORD)
mc.MOV_ri(eax.value, fail_index)
- mc.POP_r(edi.value) # [ebp-12]
- mc.POP_r(esi.value) # [ebp-8]
- mc.POP_r(ebx.value) # [ebp-4]
- mc.POP_r(ebp.value) # [ebp]
+ mc.POP(edi) # [ebp-12]
+ mc.POP(esi) # [ebp-8]
+ mc.POP(ebx) # [ebp-4]
+ mc.POP(ebp) # [ebp]
mc.RET()
- @specialize.arg(2)
- def implement_guard(self, addr, emit_jump):
- emit_jump(rel32(addr))
+ def implement_guard(self, addr, emit_jump_index):
+ self.mc.J_il(emit_jump_index, addr)
return self.mc.tell() - 4
def genop_call(self, op, arglocs, resloc):
@@ -1273,7 +1274,7 @@
return loop_token._x86_arglocs
def closing_jump(self, loop_token):
- self.mc.JMP(rel32(loop_token._x86_loop_code))
+ self.mc.JMP_l(loop_token._x86_loop_code)
def malloc_cond_fixedsize(self, nursery_free_adr, nursery_top_adr,
size, tid, slowpath_addr):
Modified: pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/codebuf.py
==============================================================================
--- pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/codebuf.py (original)
+++ pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/codebuf.py Sun Dec 20 14:19:50 2009
@@ -3,11 +3,12 @@
from pypy.rpython.lltypesystem import lltype, rffi
from pypy.translator.tool.cbuild import ExternalCompilationInfo
from pypy.jit.backend.x86.rx86 import X86_32_CodeBuilder
+from pypy.jit.backend.x86.regloc import LocationCodeBuilder
from pypy.rlib.rmmap import PTR, alloc, free
from pypy.rlib.debug import make_sure_not_resized
-class InMemoryCodeBuilder(X86_32_CodeBuilder):
+class InMemoryCodeBuilder(X86_32_CodeBuilder, LocationCodeBuilder):
_last_dump_start = 0
def __init__(self, start, end):
Modified: pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/regloc.py
==============================================================================
--- pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/regloc.py (original)
+++ pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/regloc.py Sun Dec 20 14:19:50 2009
@@ -1,6 +1,12 @@
from pypy.jit.metainterp.history import AbstractValue
from pypy.jit.backend.x86 import rx86
+#
+# This module adds support for "locations", which can be either in a Const,
+# or a RegLoc or a StackLoc. It also adds operations like mc.ADD(), which
+# take two locations as arguments, decode them, and calls the right
+# mc.ADD_rr()/ADD_rb()/ADD_ri().
+#
class AssemblerLocation(AbstractValue):
__slots__ = 'value'
@@ -33,3 +39,64 @@
XMMREGLOCS = [RegLoc(i, is_xmm=True) for i in range(8)]
eax, ecx, edx, ebx, esp, ebp, esi, edi = REGLOCS
xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7 = XMMREGLOCS
+
+
+class LocationCodeBuilder(object):
+ _mixin_ = True
+
+ def _binaryop(name):
+ def INSN(self, loc1, loc2):
+ assert isinstance(loc1, RegLoc)
+ val1 = loc1.value
+ if isinstance(loc2, RegLoc):
+ getattr(self, name + '_rr')(val1, loc2.value)
+ elif isinstance(loc2, StackLoc):
+ getattr(self, name + '_rb')(val1, loc2.value)
+ else:
+ getattr(self, name + '_ri')(val1, loc2.getint())
+ return INSN
+
+ ADD = _binaryop('ADD')
+ OR = _binaryop('OR')
+ AND = _binaryop('AND')
+ SUB = _binaryop('SUB')
+ XOR = _binaryop('XOR')
+
+ def PUSH(self, loc):
+ assert isinstance(loc, RegLoc)
+ self.PUSH_r(loc.value)
+
+ def POP(self, loc):
+ assert isinstance(loc, RegLoc)
+ self.POP_r(loc.value)
+
+ def CMP(self, loc0, loc1):
+ if isinstance(loc0, RegLoc):
+ val0 = loc0.value
+ if isinstance(loc1, RegLoc):
+ self.CMP_rr(val0, loc1.value)
+ elif isinstance(loc1, StackLoc):
+ self.CMP_rb(val0, loc1.value)
+ else:
+ self.CMP_ri(val0, loc1.getint())
+ else:
+ assert isinstance(loc0, StackLoc)
+ val0 = loc0.value
+ if isinstance(loc1, RegLoc):
+ self.CMP_br(val0, loc1.value)
+ else:
+ self.CMP_bi(val0, loc1.getint())
+
+ def CMPi(self, loc0, loc1):
+ # like CMP, but optimized for the case of loc1 being a Const
+ assert isinstance(loc1, Const)
+ if isinstance(loc0, RegLoc):
+ self.CMP_ri(loc0.value, loc1.getint())
+ else:
+ assert isinstance(loc0, StackLoc)
+ self.CMP_bi(loc0.value, loc1.getint())
+
+
+all_extra_instructions = [name for name in LocationCodeBuilder.__dict__
+ if name[0].isupper()]
+all_extra_instructions.sort()
Modified: pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/rx86.py
==============================================================================
--- pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/rx86.py (original)
+++ pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/rx86.py Sun Dec 20 14:19:50 2009
@@ -1,5 +1,4 @@
import py
-from pypy.rlib.rarithmetic import intmask
from pypy.rlib.objectmodel import ComputedIntSymbolic, we_are_translated
from pypy.rlib.objectmodel import specialize
from pypy.rlib.unroll import unrolling_iterable
@@ -83,6 +82,8 @@
mc.writeimm8(immediate)
elif width == 'h':
mc.writeimm16(immediate)
+ elif width == 'o':
+ return immediate # in the 'orbyte' for the next command
elif width == 'q' and mc.WORD == 8:
mc.writeimm64(immediate)
else:
@@ -113,7 +114,6 @@
mc.writechar(chr(0x40 | orbyte | R.ebp))
mc.writeimm8(offset)
else:
- assert fits_in_32bits(offset)
mc.writechar(chr(0x80 | orbyte | R.ebp))
mc.writeimm32(offset)
return 0
@@ -134,7 +134,6 @@
mc.writechar(SIB)
mc.writeimm8(offset)
else:
- assert fits_in_32bits(offset)
mc.writechar(chr(0x84 | orbyte))
mc.writechar(SIB)
mc.writeimm32(offset)
@@ -148,7 +147,6 @@
def encode_mem_reg_plus_const(mc, (reg, offset), _, orbyte):
assert reg != R.esp and reg != R.ebp
- assert fits_in_32bits(offset)
#
reg1 = reg_number_3bits(mc, reg)
no_offset = offset == 0
@@ -191,7 +189,6 @@
# emit "reg1 + (reg2 << scaleshift) + offset"
assert reg1 != R.ebp and reg2 != R.esp
assert 0 <= scaleshift < 4
- assert fits_in_32bits(offset)
reg1 = reg_number_3bits(mc, reg1)
reg2 = reg_number_3bits(mc, reg2)
SIB = chr((scaleshift<<6) | (reg2<<3) | reg1)
@@ -290,9 +287,12 @@
base = group * 8
char = chr(0xC0 | base)
INSN_ri8 = insn(rex_w, '\x83', register(1), char, immediate(2,'b'))
- INSN_ri32 = insn(rex_w, '\x81', register(1), char, immediate(2))
+ INSN_ri32= insn(rex_w, '\x81', register(1), char, immediate(2))
INSN_rr = insn(rex_w, chr(base+1), register(2,8), register(1,1), '\xC0')
+ INSN_br = insn(rex_w, chr(base+1), register(2,8), stack_bp(1))
INSN_rb = insn(rex_w, chr(base+3), register(1,8), stack_bp(2))
+ INSN_bi8 = insn(rex_w, '\x83', orbyte(base), stack_bp(1), immediate(2,'b'))
+ INSN_bi32= insn(rex_w, '\x81', orbyte(base), stack_bp(1), immediate(2))
def INSN_ri(mc, reg, immed):
if single_byte(immed):
@@ -301,7 +301,14 @@
INSN_ri32(mc, reg, immed)
INSN_ri._always_inline_ = True # try to constant-fold single_byte()
- return INSN_ri, INSN_rr, INSN_rb
+ def INSN_bi(mc, offset, immed):
+ if single_byte(immed):
+ INSN_bi8(mc, offset, immed)
+ else:
+ INSN_bi32(mc, offset, immed)
+ INSN_bi._always_inline_ = True # try to constant-fold single_byte()
+
+ return INSN_ri, INSN_rr, INSN_rb, INSN_bi, INSN_br
# ____________________________________________________________
@@ -351,12 +358,12 @@
# ------------------------------ Arithmetic ------------------------------
- ADD_ri, ADD_rr, ADD_rb = common_modes(0)
- OR_ri, OR_rr, OR_rb = common_modes(1)
- AND_ri, AND_rr, AND_rb = common_modes(4)
- SUB_ri, SUB_rr, SUB_rb = common_modes(5)
- XOR_ri, XOR_rr, XOR_rb = common_modes(6)
- CMP_ri, CMP_rr, CMP_rb = common_modes(7)
+ ADD_ri, ADD_rr, ADD_rb, _, _ = common_modes(0)
+ OR_ri, OR_rr, OR_rb, _, _ = common_modes(1)
+ AND_ri, AND_rr, AND_rb, _, _ = common_modes(4)
+ SUB_ri, SUB_rr, SUB_rb, _, _ = common_modes(5)
+ XOR_ri, XOR_rr, XOR_rb, _, _ = common_modes(6)
+ CMP_ri, CMP_rr, CMP_rb, CMP_bi, CMP_br = common_modes(7)
# ------------------------------ Misc stuff ------------------------------
@@ -375,6 +382,10 @@
XCHG_rm = insn(rex_w, '\x87', register(1,8), mem_reg_plus_const(2))
+ JMP_l = insn('\xE9', relative(1))
+ J_il = insn('\x0F', immediate(1,'o'), '\x80', relative(2))
+ SET_ir = insn('\x0F', immediate(1,'o'),'\x90', register(2), '\xC0')
+
# ------------------------------ SSE2 ------------------------------
MOVSD_rr = xmminsn('\xF2', rex_nw, '\x0F\x10', register(1,8), register(2),
@@ -390,6 +401,25 @@
# ------------------------------------------------------------
+Conditions = {
+ 'O': 0,
+ 'NO': 1,
+ 'C': 2, 'B': 2, 'NAE': 2,
+ 'NC': 3, 'NB': 3, 'AE': 3,
+ 'Z': 4, 'E': 4,
+ 'NZ': 5, 'NE': 5,
+ 'BE': 6, 'NA': 6,
+ 'NBE': 7, 'A': 7,
+ 'S': 8,
+ 'NS': 9,
+ 'P': 10, 'PE': 10,
+ 'NP': 11, 'PO': 11,
+ 'L': 12, 'NGE': 12,
+ 'NL': 13, 'GE': 13,
+ 'LE': 14, 'NG': 14,
+ 'NLE': 15, 'G': 15,
+}
+
class X86_32_CodeBuilder(AbstractX86CodeBuilder):
WORD = 4
@@ -399,9 +429,14 @@
WORD = 8
def writeimm64(self, imm):
- imm32 = intmask(rffi.cast(rffi.INT, imm))
- self.writeimm32(imm32)
- self.writeimm32(imm >> 32)
+ self.writechar(chr(imm & 0xFF))
+ self.writechar(chr((imm >> 8) & 0xFF))
+ self.writechar(chr((imm >> 16) & 0xFF))
+ self.writechar(chr((imm >> 24) & 0xFF))
+ self.writechar(chr((imm >> 32) & 0xFF))
+ self.writechar(chr((imm >> 40) & 0xFF))
+ self.writechar(chr((imm >> 48) & 0xFF))
+ self.writechar(chr((imm >> 56) & 0xFF))
# MOV_ri from the parent class is not wrong, but here is a better encoding
# for the common case where the immediate fits in 32 bits
Modified: pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86.py
==============================================================================
--- pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86.py (original)
+++ pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86.py Sun Dec 20 14:19:50 2009
@@ -94,6 +94,23 @@
ofs = 0x01234567 - (0x76543210+5)
assert s.getvalue() == '\xE8' + struct.pack("<i", ofs)
+def test_jmp_l():
+ s = CodeBuilder32()
+ s.JMP_l(0x01234567)
+ ofs = 0x01234567 - (0x76543210+5)
+ assert s.getvalue() == '\xE9' + struct.pack("<i", ofs)
+
+def test_j_il():
+ s = CodeBuilder32()
+ s.J_il(5, 0x01234567)
+ ofs = 0x01234567 - (0x76543210+6)
+ assert s.getvalue() == '\x0F\x85' + struct.pack("<i", ofs)
+
+def test_set_ir():
+ s = CodeBuilder32()
+ s.SET_ir(5, 2)
+ assert s.getvalue() == '\x0F\x95\xC2'
+
class CodeBuilder64(CodeBuilderMixin, X86_64_CodeBuilder):
pass
Modified: pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86_32_auto_encoding.py
==============================================================================
--- pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86_32_auto_encoding.py (original)
+++ pypy/branch/remove-ri386-multimethod-2/pypy/jit/backend/x86/test/test_rx86_32_auto_encoding.py Sun Dec 20 14:19:50 2009
@@ -220,6 +220,8 @@
return [] # MOV EAX, [immediate]: there is a special encoding
if methname == 'MOV_jr' and args[1] == rx86.R.eax:
return [] # MOV [immediate], EAX: there is a special encoding
+ if methname == 'SET_ir':
+ py.test.skip("SET_ir: must be tested manually")
return [args]
def get_code_checker_class(self):
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